參數(shù)資料
型號: LK32168R2K-T
廠商: TAIYO YUDEN CO LTD
元件分類: 通用定值電感
英文描述: 1 ELEMENT, 8.2 uH, FERRITE-CORE, GENERAL PURPOSE INDUCTOR, SMD
文件頁數(shù): 5/18頁
文件大小: 862K
代理商: LK32168R2K-T
PRECAUTIONS
273
FERRITE
PRODUCTS
TAIYOYUDEN CO., LTD.
5
(2) Examples of good and bad solder application
Not recommended
Recommended
2.PCB Design
Not recommended
Recommended
Deflection of
the board
Mixed mounting
of SMD and
leaded compo-
nents
Component
placement close
to the chassis
Hand-soldering
of leaded com-
ponents near
mounted compo-
nents
Horizontal com-
ponent place-
ment
S
Pattern configurations
(Inductor layout on panelized [breakaway] PC boards)
1. After inductors have been mounted on the boards, chips
can be subjected to mechanical stresses in subsequent
manufacturing processes (PCB cutting, board inspec-
tion, mounting of additional parts, assembly into the
chassis, wave soldering the reflow soldered boards etc.)
For this reason, planning pattern configurations and
the position of SMD inductors should be carefully per-
formed to minimize stress.
1-1. The following are examples of good and bad inductor layout; SMD inductors
should be located to minimize any possible mechanical stresses from board
warp or deflection.
Item
1-2. To layout the inductors for the breakaway PC board, it should be noted that
the amount of mechanical stresses given will vary depending on inductor
layout. An example below should be counted for better design.
1-3. When breaking PC boards along their perforations, the amount of mechani-
cal stress on the inductors can vary according to the method used.
The
following methods are listed in order from least stressful to most stressful:
push-back, slit, V-grooving, and perforation. Thus, any ideal SMD inductor
layout must also consider the PCB splitting procedure.
2/7
Stages
Precautions
Technical considerations
Precautions on the use of Multilayer chip Inductors, Multilayer chip inductors for high frequency, Multilayer ferrite chip beads
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