參數(shù)資料
型號: LIS33DE
廠商: STMICROELECTRONICS
元件分類: 模擬信號調(diào)理
英文描述: SPECIALTY ANALOG CIRCUIT, PBGA16
封裝: 3 X 3 MM, 1 MM HEIGHT, GREEN, PLASTIC, LGA-16
文件頁數(shù): 7/31頁
文件大?。?/td> 532K
代理商: LIS33DE
LIS33DE
Application hints
Doc ID 15596 Rev 1
15/31
4
Application hints
Figure 5.
LIS33DE electrical connection
The device core is supplied through Vdd line while the I/O pads are supplied through
Vdd_IO line. Power supply decoupling capacitors (100 nF ceramic, 10 F Al) should be
placed as near as possible to the pin 14 of the device (common design practice).
All the voltage and ground supplies must be present at the same time to have proper
behavior of the IC (refer to
Figure 5). It is possible to remove Vdd maintaining Vdd_IO
without blocking the communication bus, in this condition the measurement chain is
powered off.
The functionality of the device and the measured acceleration data is selectable and
accessible through the I2C/SPI interface.When using the I2C, CS must be tied high.
The functions, the threshold and the timing of the interrupt pin (INT) can be completely
programmed by the user through the I2C/SPI interface.
4.1
Soldering information
The LGA package is compliant with the ECOPACK, RoHS and “Green” standard.
It is qualified for soldering heat resistance according to JEDEC J-STD-020C.
Leave “Pin 1 Indicator” unconnected during soldering.
Land pattern and soldering recommendations are available at www.st.com/mems.
CS
10uF
Vdd
100nF
GND
Vdd_IO
SDO
SDA/SDI/S
DO
INT
SCL/SPC
Digital signal from/to signal controller.Signal’s levels are defined by proper selection of Vdd_IO
1
5
8
13
TOP VIEW
6
9
14
16
9
5
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