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參數(shù)資料
| 型號(hào)： | LH52258A |
| 廠商： | Sharp Corporation |
| 英文描述： | CMOS 32K x 8 Static RAM |
| 中文描述： | 32K的× 8的CMOS靜態(tài)RAM |
| 文件頁數(shù)： | 1/9頁 |
| 文件大?。?/td> | 77K |
| 代理商： | LH52258A |
LH52258A
CMOS 32K
×
8 Static RAM
FEATURES
Fast Access Times: 20/25 ns
Low-Power Standby when Deselected
TTL Compatible I/O
5 V
±
10% Supply
Fully-Static Operation
JEDEC Standard Pinout
Packages:
28-Pin, 300-mil DIP
28-Pin, 300-mil SOJ
FUNCTIONAL DESCRIPTION
The LH52258A is a high-speed 262,144 bit static RAM
organized as 32K
×
8. A fast, efficient design is obtained
with a CMOS periphery and a matrix constructed with
polysilicon load memory cells.
This RAM is fully static in operation. The Chip Enable
(E) control permits Read and Write operations when
active (LOW) or places the RAM in a low-power standby
mode when inactive (HIGH). Standby power (I
SB1
) drops
to its lowest level if E is raised to within 0.2 V of V
CC
.
Write cycles occur when both Chip Enable (E) and
Write Enable (W) are LOW. Data is transferred from the
DQ pins to the memory location specified by the 15
address lines. The proper use of the Output Enable
control (G) can prevent bus contention.
When E is LOW and W is HIGH, a static Read will
occur at the memory location specified by the address
lines. G must be brought LOW to enable the outputs.
Since the device is fully static in operation, new Read
cycles can be performed by simply changing the address.
High-frequency design techniques should be em-
ployed to obtain the best performance from this device.
Solid, low-impedance power and ground planes, with
high-frequency decoupling capacitors, are recom-
mended. Series termination of the inputs should be con-
sidered when transmission line effects occur.
PIN CONNECTIONS
52258A-1D
1
2
3
4
5
6
7
8
9
10
11
12
A
14
A
12
A
7
A
6
A
5
A
4
A
3
A
2
A
1
A
0
V
SS
28
27
26
25
24
23
22
21
20
19
V
CC
W
A
13
A
8
A
9
A
11
G
A
10
E
DQ
7
DQ
6
DQ
5
DQ
4
18
17
DQ
3
13
14
16
15
DQ
0
DQ
1
DQ
2
28-PIN DIP
28-PIN SOJ
TOP VIEW
Figure 1. Pin Connections for DIP and
SOJ Packages
1
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| LH525C2T | 256K SRAM |
| LH525C9N | 256K SRAM |
| LH525CL2 | 256K SRAM |
| LH525CL9 | 256K SRAM |
| LH5268A | CMOS 64K (8K x 8) Static RAM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| LH52258AD-15 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x8 SRAM |
| LH52258AD-20 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x8 SRAM |
| LH52258AD-25 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x8 SRAM |
| LH52258AD-30 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x8 SRAM |
| LH52258AK-15 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x8 SRAM |
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