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參數(shù)資料
| 型號(hào)： | LG1627BXC |
| 英文描述： | LG1627BXC Clocked Laser Driver |
| 中文描述： | LG1627BXC時(shí)鐘激光驅(qū)動(dòng)器 |
| 文件頁(yè)數(shù)： | 3/10頁(yè) |
| 文件大?。?/td> | 921K |
| 代理商： | LG1627BXC |
Agere Systems Inc.
3
Data Sheet
May 2001
LG1627BXC Clocked Laser Driver
Pin Information
5-6551(F).br.3
Figure 3. Pin Diagram
Table 1. Pin Descriptions
* National Semiconductor is a registered trademark of National Semiconductor Corporation.
Pin
1
2
3
Symbol
V
TH
V
IN
V
IN
Description
Capacitor to ground (data input reference).
Data input.
Complementary data input.
Ground. For optimum performance, the package bottom must be soldered to the
ground plane.
4, 13, 14,
package
bottom
5
6
7
8
9
10
11
12
15, 16
17
18
19
20
21
22, 23
24
GND
CLK
CLK
BG2P5
MOD_E
PWP
PWN
MK
MK
I
OUT
I
OUT-PRE
V
PRE
V
SS2
V
SS3
V
MOD
V
SS1
CLK_E
Clock input.
Complementary clock input.
2.5 V band-gap reference (National Semiconductor* p/n LM4040).
Modulation enable (connect to V
SS1
to enable, float to disable).
Pulse width adjust positive.
Pulse width adjust negative.
Complementary mark density output.
Mark density output.
Output modulation current (dc coupled to laser cathode).
Output prebias current.
Prebias control input.
V
SS2
supply
5.2 V for output prebias.
V
SS3
supply
5.2 V for output modulation.
Modulation current control input.
V
SS1
supply
5.2 V.
Clock enable (connect to V
SS1
to enable, float to disable).
GND
GND
I
OUT
I
OUT
I
OUT-PRE
V
PRE
V
S
V
S
V
M
V
S
V
S
C
B
M
P
P
M
M
V
TH
V
IN
GND
CLK
CLK
V
IN
1
2
3
4
5
6
7
8
9
10 11 12
13
14
15
16
17
18
19
20
21
22
23
24
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