參數(shù)資料
型號(hào)： LCP-8500B4QDR
元件分類： 光收發(fā)
英文描述： FIBER OPTIC TRANSCEIVER, 1260-1355nm, 8500Mbps(Tx), 8500Mbps(Rx), SURFACE MOUNT, LC CONNECTOR
封裝： ROHS COMPLIANT PACKAGE
文件頁(yè)數(shù)： 10/14頁(yè)
文件大?。?/td> 273K
代理商： LCP-8500B4QDR
LCP-8500B4QDRx
DELTA ELECTRONICS, INC.
5
Revision: S0
2010/6/4
www.deltaww.com
Module Electrical Pin Definition
Pin
Logic
Symbol
Name/Description
Note
1
VeeT
Module Transmitter Ground
1
2
LVTTL-O
TX_Fault
Module Transmitter Fault
2
3
LVTTL-I
TX_Disable
Transmitter Disable; Turns off transmitter laser output
3
4
LVTTL-I/O
SDA
2- write Serial Interface Data Line
5
LVTTL-I/O
SCL
2- write Serial Interface Clock
6
MOD_ABS
Module Absent, connected to VeeT or VeeR in the module
4
7
LVTTL-I
RS0
Not Implement
8
LVTTL-O
RX_LOS
Receiver Loss of Signal Indication
2
9
LVTTL-I
RS1
Not Implement
10
VeeR
Module Receiver Ground
1
11
VeeR
Module Receiver Ground
1
12
CML-O
RD-
Receiver Inverted Data Output
13
CML-O
RD+
Receiver Non-Inverter Data Output
14
VeeR
Module Receiver Ground
1
15
VccR
Module Receiver 3.3V Supply
16
VccT
Module Transmitter 3.3V Supply
17
VeeT
Module Transmitter Ground
1
18
CML-I
TD+
Transmitter Non-Inverted Data Input
19
CML-I
TD-
Transmitter Inverted Data Input
20
VeeT
Module Transmitter Griund
1
Note:
1.
The module signal ground pins, VeeR and VeeT, shall be isolated from the module case.
2.
This pin is an open collector/drain output pin and shall be pulled up with 4.7k-10k ohms to Host_Vcc
on the host board. Pull ups can be connected to multiple power supplies, however the host board
design shall ensure that no module pin has voltage exceeding module VccT/R + 0.5V.
3.
This pin is an open collector/drain input pin and shall be pulled up with 4.7k-10k ohms to VccT in the
Module.
4.
This pin shall be pulled up with 4.7k-10k ohms to Host_Vcc on the host board.
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