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參數(shù)資料
| 型號： | LC895297 |
| 廠商： | Sanyo Electric Co.,Ltd. |
| 英文描述： | Full CAV 20× CD-ROM Decoder with Built-in ATA-PI (IDE) Interface and CD-DSP(全CAV 20倍速CD-ROM譯碼器帶內(nèi)置式ATAPI (IDE)接口和CD-DSP) |
| 中文描述： | 全部角速度20 ×的CD - ROM在阿拉木圖內(nèi)置解碼器，皮（IDE）的接口和CD -數(shù)字信號處理器（全角速度20倍速的CD - ROM譯碼器帶內(nèi)置式的ATAPI（IDE）的接口和光盤的DSP） |
| 文件頁數(shù)： | 2/9頁 |
| 文件大小： | 70K |
| 代理商： | LC895297 |
No. 5785-2/9
LC895297
Parameter
Symbol
Conditions
Ratings
Unit
Maximum supply voltage
V
DD
max
V
I
, V
O
Pd max
–0.3 to +7.0
V
Input and output voltage
–0.3 to V
DD
+0.3
V
Allowable power dissipation
Ta
≤
70°C
*
1
500
mW
Operating temperature
Topr
–30 to +70
°C
Storage temperature
Tstg
–55 to +125
°C
Soldering conditions (pins only)
10s
235
°C
Input and output current
I
I
, I
O
Per individual input or output cell
±20
mA
Note 1: Applications that use this IC must adopt heat dissipation measures, such as the insertion of a thermally conductive sheet.
Specifications
Absolute Maximum Ratings
at Ta = 25°C, V
SS
= 0 V
Parameter
Symbol
Conditions
Ratings
Unit
min
typ
max
[Input and Output Cell Power Supply]
Supply voltage
V
DD
V
IN
4.5
5.0
5.5
V
Input voltage range
0
V
DD
V
[Internal Cell Power Supply]
Supply voltage
V
DD
V
IN
3.9
4.0
4.1
V
Input voltage range
0
V
DD
V
Allowable Operating Ranges
at Ta = –30 to +70°C, V
SS
= 0 V
Parameter
Symbol
Conditions
Ratings
Unit
min
typ
max
Input high-level voltage
V
IH
VIL
TTL levels. Applicable pins: (10) and (13)
2.2
V
Input low-level voltage
0.8
V
Input high-level voltage
V
IH
V
IL
V
IH
V
IL
V
IH
V
IL
V
IH
V
IL
TTL levels. Applicable pins: (1)
2.2
V
Input low-level voltage
Pull-up resistor included.
0.8
Input high-level voltage
TTL levels. Applicable pins: (2), (3), and (15)
2.4
V
Input low-level voltage
Schmitt inputs.
0.8
V
Input high-level voltage
CMOS levels: Applicable pins: (14)
0.7 V
DD
V
Input low-level voltage
0.3 V
DD
V
Input high-level voltage
CMOS levels: Applicable pins: (4)
0.8 V
DD
V
Input low-level voltage
Schmitt inputs.
0.2 V
DD
V
Output high-level voltage
V
OH
I
OH
= –2 mA: Applicable pins: (5), (1), (9),
(10), and (15)
V
DD
– 2.1
V
Output low-level voltage
V
OL
I
OL
= 2 mA: Applicable pins: (5), (1), (9),
(10), and (15)
0.4
V
Output high-level voltage
V
OH
V
OL
V
OL
V
OL
I
OH
= –4 mA: Applicable pins: (3) and (6)
I
OL
= 24 mA: Applicable pins: (3) and (6)
I
OL
= 2 mA: Applicable pins: (7) and (11)
I
OL
= 24 mA: Applicable pins: (12)
V
I
= V
SS
, V
DD
: Applicable pins: (2), (3), (4),
(10), and (15)
V
DD
– 2.1
V
Output low-level voltage
0.4
V
Output low-level voltage
0.4
V
Output low-level voltage
0.4
V
Input leakage current
I
IL
–10
+10
μA
Output leakage current
I
OZ
In high-impedance output mode: Applicable
pins: (3), (6), (7), (9), (10), (12), and (15)
–10
+10
μA
Pull-up resistance
The applicable pin sets are as follows:
[INPUT]
(2) ZRESET, ZDMACK, ZHRST, DA0to DA2, ZCS1FX, ZCS3FX, ZDIOR, ZDIOW, FG
(4) ZCSCTRL, ZCS, ZRD, ZWR, HFL, TES
(14) DEFI
(13) SUA0 o SUA6
[OUTPUT]
(6) DMARQ, HINTRQ
(5) RA0 to RA8, ZRAS0, ZCAS0, ZOE, ZUWE, ZLWE, C2F, ROMXA, FSX, EFLG, PCK, FSEQ, TOFF, TGL, 4.2M, WRQ, RWC, COIN, ZCQCK, RCHP,
RCHN, LCHP, LCHN
(7) ZRSTCPU, ZRSTIC
(9) JP
+
, JP
–
, SPO
(11) ZINT0, ZINT1, ZSWAIT
(12) IORDY, ZIOCS16
R
UP
Applicable pins: (1) and (11)
40
80
160
k
Electrical Characteristics
at Ta = –30 to +70°C, V
SS
= 0 V, V
DD
= 4.5 to 5.5 V
Continued on next page.
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