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參數(shù)資料
| 型號： | LC72146M |
| 廠商： | SANYO SEMICONDUCTOR CO LTD |
| 元件分類： | PLL合成/DDS/VCOs |
| 英文描述： | PLL FREQUENCY SYNTHESIZER, 40 MHz, PDSO24 |
| 封裝： | MFP-24 |
| 文件頁數(shù)： | 11/22頁 |
| 文件大?。?/td> | 157K |
| 代理商： | LC72146M |
Figure 11
Figure 12
2. FMIN, AMIN, HCTR and LCTR
These inputs should each be capacitively coupled using a 50 to 100 pF capacitor. Also, these capacitors should
be mounted as close as possible to their respective inputs.
3. IF counting using HCTR or LCTR
The LC72146 can perform IF count tuning when connected to an SD (station detector) signal from an IF IC.
IF counting should start when the SD signal becomes active.
Note on IF counting: The SD (station detect) signal must be used in conjunction with IF counting.
When using the general-purpose counter for IF counting, be sure to determine whether or not there is an SD
signal from the IF IC. The IF counter buffer should be turned on and IF counting performed only if there is an
SD signal. Autosearch techniques that use only the IF counter are not recommended, since it is possible for IF
buffer leakage output to cause incorrect stops at points where there is no station.
4. Using the DO pin
In modes other than data output mode, the DO pin is also used for counter completion, unlock detection, and for
checking for changes in the input pin. (In these cases the DO pin will change from the high to the low level.)
The state of the input pin can be input to the controller directly through the DO pin.
5. Power supply pins
Capacitors must be inserted between the power supply VDD and VSS pins for noise exclusion. These capacitors
must be placed as close as possible to the VDD and VSS pins.
6. VCO setup
Applications must be designed so that the VCO (local oscillator) does not stop, even if the control voltage
(Vtune) goes to 0 V. If it is possible for the oscillator to stop, the application must be use the control data (DLC)
to temporarily force Vtune to VCC to prevent deadlock from occuring. (Deadlock clear circuit)
Pin States at Power On and Reset
No. 4922-19/22
LC72146, 72146M, 72146V
Reference Divider
Phase
Detector
Programmable Divider
fr
LPF
VCO
MIX
V
(A)
(B)
(ns)
Dead Zone
Leakage
RF
fp
XOUT
CE
DI
CL
DO
O–7
O–6
I/O–5
I/O–4
I/O–3
I/O–2
I/O–1
O–7
O–6
I–5
I–4
I–3
I–2
I–1
O
L
F
O: Open
L: Low
F: Floating
I–6
I–7
F
XIN
VSS
AOUT
AIN
PD0
PD1
VSS
FMIN
AMIN
VDD
HCTR/I–6
HCTR/I–7
State
Power On
Reset
L
C
7
2
1
4
6
,
7
2
1
4
6
M
,
7
2
1
4
6
V
State
Power On
Reset
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