參數(shù)資料
型號: LC72135M
廠商: Sanyo Electric Co.,Ltd.
英文描述: PLL Frequency Synthesizer for Electronic Tuning(用于電子調(diào)諧的鎖相環(huán)頻率合成器)
中文描述: 鎖相環(huán)頻率合成器電子調(diào)諧(用于電子調(diào)諧的鎖相環(huán)頻率合成器)
文件頁數(shù): 6/24頁
文件大?。?/td> 300K
代理商: LC72135M
Pin Functions
No. 5175-6/24
LC72135M
Symbol
Pin No.
Type
Functions
Circuit configuration
XIN
XOUT
FMIN
AMIN
CE
CL
DI
DO
V
DD
1
20
14
13
2
4
3
5
15
Xtal OSC
Local oscillator
signal input
Local oscillator
signal input
Chip enable
Clock
Data input
Data output
Power supply
Crystal resonator connection
(4.5/7.2 MHz)
FMIN is selected when the serial data input DVS bit is
set to 1.
The input frequency range is from 10 to 160 MHz.
The input signal passes through the internal divide-by-
two prescaler and is input to the swallow counter.
The divisor can be in the range 272 to 65535. However,
since the signal has passed through the divide-by-two
prescaler, the actual divisor is twice the set value.
AMIN is selected when the serial data input DVS bit is
set to 0.
When the serial data input SNS bit is set to 1:
— The input frequency range is 2 to 40 MHz.
— The signal is directly input to the swallow counter.
— The divisor can be in the range 272 to 65535, and
the divisor used will be the value set.
When the serial data input SNS bit is set to 0:
— The input frequency range is 0.5 to 10 MHz.
— The signal is directly input to a 12-bit programmable
divider.
— The divisor can be in the range 4 to 4095, and the
divisor used will be the value set.
Set this pin high when inputting (DI) or outputting (DO)
serial data.
Used as the synchronization clock when inputting (DI) or
outputting (DO) serial data.
Inputs serial data transferred from the controller to the
LC72135M.
Outputs serial data transferred from the LC72135M to
the controller.
The content of the output data is determined by the
serial data DOC0 to DOC2.
The LC72135M power supply pin (V
DD
= 4.5 to 5.5 V)
The power on reset circuit operates when power is first
applied.
Continued on next page.
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