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參數(shù)資料
| 型號(hào)： | LC717A00AR-NH |
| 廠商： | ON Semiconductor |
| 文件頁數(shù)： | 4/11頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC TOUCH SENSOR CAP-DGTL VCT28 |
| 標(biāo)準(zhǔn)包裝： | 2,000 |
| 系列： | * |
LC717A00AR
No.A2048-2/11
Specifications
Absolute Maximum Ratings
at Ta = +25
°C
Parameter
Symbol
Ratings (VSS = 0V)
Unit
Remarks
Supply voltage
VDD
-0.3 to +6.5
V
Input voltage
VIN
-0.3 to VDD+0.3
V
*1
Output voltage
VOUT
-0.3 to VDD+0.3
V
*2
Power dissipation
Pd max
160
mW
Ta = +105
°C,
Mounted on a substrate *3
Peak output current
IOP
±8
mA
per terminal,
50% Duty ratio *2
Total output current
IOA
±40
mA
Output total value of LSI,
25% Duty ratio
Storage temperature
Tstg
-55 to +125
°C
*1) Apply to Cin0 to 7, Cref, nRST, SCL, SDA, SA, SCK, SI, nCS, GAIN
*2) Apply to Cdrv, Pout0 to 7, SDA, SO, ERROR, INTOUT
*3) 4-layer glass epoxy board (40
×50×0.8t mm)
Recommended Operating Conditions
Parameter
Symbol
Conditions
min
typ
max
Unit
Remarks
Operating supply voltage
VDD
2.6
5.5
V
Supply ripple + noise
Vpp
±20
mV
*1
Operating temperature
Topr
-40
25
105
°C
*1) Inserting a high-valued capacitor and a low-valued capacitor in parallel between VDD and VSS is recommended.
In this case, the small-valued capacitor should be at least 0.1
μF, and is mounted near the LSI.
Electrical Characteristics
at VSS = 0V, VDD = 2.6 to 5.5V, Ta = -40 to +105°C
* Unless otherwise specified, the Cdrv drive frequency is fCDRV = 143kHz.
* Not tested at low temperature before shipment.
Parameter
Symbol
Conditions
min
typ
max
Unit
Remarks
Capacitance detection resolution
N
8
bit
Output noise RMS
NRMS
minimum gain setting
±1.0
LSB
*1 *3
Input offset capacitance
adjustment range
CoffRANGE
±8.0
pF
*1 *3
Input offset capacitance
adjustment resolution
CoffRESO
8
bit
Cin offset drift
CinDRIFT
minimum gain setting
±8
LSB
*1
Cin detection sensitivity
CinSENSE
minimum gain setting
0.04
0.12
LSB/fF
*2
Cin pin leak current
ICin
Cin = Hi-Z
±25
±500
nA
Cin allowable parasitic input
capacitance
CinSUB
Cin against VSS
30
pF
*1 *3
Cdrv drive frequency
fCDRV
100
143
186
kHz
Cdrv pin leak current
ICDRV
Cdrv = Hi-Z
±25
±500
nA
nRST minimum pulse width
tNRST
1
μs
*1
Power-on reset time
tPOR
20
ms
*1
Power-on reset operation
condition: Hold time
tPOROP
10
ms
*1
Power-on reset operation
condition: Input voltage
VPOROP
0.1
V
*1
Power-on reset operation
condition: Power supply rise rate
tVDD
0V to VDD
1
V/ms
*1
VIH
High input
0.8VDD
Pin input voltage
VIL
Low input
0.2VDD
V
*1 *4
VOH
High output
(IOH = +3mA)
0.8VDD
Pin output voltage
VOL
Low output
(IOL = -3mA)
0.2VDD
V
*5
Continued to the next page.
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating
Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability.
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