
No. 5997-15/17
LC662508A, 662512A, 662516A
Parameter
Symbol
Conditions
min
typ
max
Unit
Note
[Pulse conditions]
INT0: Figure 6, conditions under which the INT0
interrupt can be accepted, conditions under
which the timer 0 event counter or pulse width
measurement input can be accepted
INT0 high and low-level pulse
widths
t
IOH
, t
IOL
2
Tcyc
High and low-level pulse widths
for interrupt inputs other than INT0
t
IIH
, t
IIL
INT1, INT2: Figure 6, conditions under which
the corresponding interrupt can be accepted
2
Tcyc
PIN1 high and low-level
pulse widths
t
PINH
, t
PINL
PIN1: Figure 6, conditions under which the
timer 1 event counter input can be accepted
2
Tcyc
RES high and low-level
pulse widths
t
RSH
, t
RSL
RES: Figure 6, conditions under which reset
can be applied.
3
Tcyc
Operating current drain
I
DD OP
V
DD
: 4MHz ceramic oscillator
V
DD
: 4MHz external clock
V
DD
: 4MHz ceramic oscillator
V
DD
: 4MHz external clock
V
DD
: V
DD
= 1.8 to 5.5 V
4.5
8.0
mA
8
4.5
8.0
mA
Halt mode current drain
I
DDHALT
2.5
5.5
mA
2.5
5.5
mA
Hold mode current drain
I
DDHOLD
0.01
10
μA
Continued from preceding page.
Note: 1. With the output Nch transistor off in shared I/O ports with the open-drain output specifications. These pins cannot be used as input pins if the
CMOS output specifications are selected.
2. With the output Nch transistor off in shared I/O ports with the open-drain output specifications. The rating for the pull-up output specification pins is
stipulated in terms of the output pull-up current IPO. These pins cannot be used as input pins if the CMOS output specifications are selected.
3. With the output Nch transistor off for CMOS output specification pins. (Also applicable when the p-channel open-drain option is specified for P8.)
4. With the output Nch transistor off for pull-up output specification pins.
5. Applies to P8 when the CMOS output specifications are selected.
6. With the output Nch transistor off for open-drain output specification pins.
7. With the output Pch transistor off for open-drain output specification pins.
8. Reset state
Tone (DTMF) Output Characteristics
DC Characteristics
at Ta = –30 to +70°C, V
SS
= 0 V
1. When the MLOUT enable option is selected (the ML output function can be used)
Note:
*
See item 2. below if the MLOUT disable mask option is selected.
2. When the MLOUT disable option is selected (the ML output function cannot be used)
Note:
*
See item 1. above if the MLOUT enable mask option is selected.
Parameter
Symbol
Conditions
min
typ
max
Unit
Tone output voltage (p-p)
V
T1
DT: Dual tone, V
DD
= 3.5 to 5.5 V
*
0.9
1.3
2.0
V
Row/column tone output
voltage ratio
D
BCR1
DT: Dual tone, V
DD
= 3.5 to 5.5 V
*
1.0
2.0
3.0
dB
Tone distortion
THD1
DT: Single tone, V
DD
= 3.5 to 5.5 V
*
2
7
%
Parameter
Symbol
Conditions
min
typ
max
Unit
Tone output voltage (p-p)
V
T1
DT: Dual tone, V
DD
= 3.0 to 5.5 V
*
0.9
1.3
2.0
V
Row/column tone output
voltage ratio
D
BCR1
DT: Dual tone, V
DD
= 3.0 to 5.5 V
*
1.0
2.0
3.0
dB
Tone distortion
THD1
DT: Single tone, V
DD
= 3.0 to 5.5 V
*
2
7
%