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| 型號： | LC65F1306A* |
| 廠商： | Sanyo Electric Co.,Ltd. |
| 文件頁數(shù)： | 12/22頁 |
| 文件大?。?/td> | 685K |
LC65F1306A
No.6829-12/22
2. Recommended Operating Range at Ta=-20 to +85
°
C, VSS=0V, VDD=3.0 to 5.5V (Unless otherwise specified)
Ratings
typ.
Parameter
Symbol
Conditions
Applicable pins
and notes
VDD
min.
3.0
max.
5.5
unit
Operating supply
voltage
Standby supply
voltage
High level input
voltage
VDD
V
VST
RAM and register values retained.
(Note 3)
Output Nch Tr. off
VDD
1.8
5.5
VIH(1)
Port C, D with
open-drain
specifications.
Port A, E, F
0.7VDD
13.5
VIH(2)
VIH(3)
Output Nch Tr. off
Output Nch Tr. off
0.7VDD
0.8VDD
VDD
VDD
The INT, SCK,
and SI pin with
open-drain
specifications.
VIH(4)
VDD=1.8 to 5.5 V
RES
OSC1
Port
Port
0.8VDD
VDD
Low level
input voltage
VIH(5)
VIL(1)
VIL(2)
VIL(3)
External clock specifications
Output Nch Tr. off VDD=4 to 5.5V
Output Nch Tr. off 3 to 5.5V
Output Nch Tr. off VDD=4 to 5.5V
0.8VDD
VSS
VSS
VSS
VDD
0.3VDD
0.25VDD
0.25VDD
INT
,
SCK
, SI
VIL(4)
Output Nch Tr. off 3 to 5.5V
INT
,
SCK
, SI
OSC1
VSS
0.2VDD
VIL(5)
External
specification
External
specification
clock
VDD=4 to 5.5V
VSS
0.25VDD
VIL(6)
clock
3 to 5.5V
OSC1
VSS
0.2VDD
VIL(7)
VIL(8)
VIL(9)
VIL(10)
fop
(Tcyc)
text
textH,
textL
textR,
textF
Cext
Rext
VDD=4 to 5.5V
3 to 5.5V
VDD=4 to 5.5V
3 to 5.5V
VDD=3 to 5.5V
TEST
TEST
RES
VSS
VSS
VSS
VSS
384
(10.4)
384
0.3VDD
0.25VDD
0.25VDD
0.2VDD
4330
(0.92)
4330
RES
kHz
(
μ
s)
kHz
Operating frequency
(cycle time)
External clock
conditions
Frequency
Pulse width
Fig. 1
VDD=3 to 5.5V
OSC1
VDD=3 to 5.5V
OSC1
69
ns
Rising/falling time
VDD=3 to 5.5V
OSC1
50
Recommended
oscillation constants
Two-pin RC
oscillator
Ceramic oscillator
(Note 4)
Fig. 2
VDD=3 to 5.5V
OSC1, OSC2
270
±
5%
5.6
±
1%
pF
k
Fig. 3
See Table
1
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