參數資料
型號: LC651304A
廠商: Sanyo Electric Co.,Ltd.
英文描述: 4-Bit Single-Chip Microcontroller for Small-Scale Control Applications
中文描述: 4位單片機的小規(guī)??刂浦械膽?/td>
文件頁數: 7/21頁
文件大小: 697K
代理商: LC651304A
LC651306A/04A/02A/01A
No.6727-7/21
Symbol
Number
of pins
I/O
Function
Option
At reset
Handling
when
unused
Identical to
those for
PA0 to PA3.
PE0-PE1
/WDR
2
I/O
I/O port E0 to E1
Input in 4-bit unit (IP instruction)
Output in 4-bit unit (OP instruction)
Set and reset in 1-bit unit
(SPB and PRB instructions)
Testing in 1-bit unit
(BP and BNP instructions)
PE0 also has a continuous pulse (64 Tcyc)
output function.
PE1 becomes the watchdog reset pin WDR
when selected as an option.
I/O port F0 to F3
The port functions and options are identical
to those of PE0 to PE1 (See note).
PF0 to PF3 have shared functions with the
serial interface pins and the INT input.
The function can be selected under program
control.
SI... Serial input pin
SO...Serial output pin
SCK...Input and output of the serial clock
signal.
INT...Interrupt request signal
The serial I/O function can be switched
between 4-bit and 8-bit transfers under
program control.
Note: There is no continuous pulse output
function.
All four pins have shared function.
PF0/AD4: AD converter input AD4
PF1/AD5: AD converter input AD5
PF2/AD6: AD converter input AD6
PF3/AD7: AD converter input AD7
System reset input
Provide an external capacitor for the
power-on reset.
Apply low level to this pin for 4 or more
clock cycles to reset and restart the program.
Test pin for LSI.
This pin must be connected to VSS during
normal operation.
(1) Open -drain output
(2) Pull-up resistor
Options (1) or (2) can be
specified in bit unit.
(3) Normal port PE1
(4) Watchdog reset WDR
Either options (3) or (4)
can be selected.
High level
output (The
output
N-channel
transistors in
the off state)
PF0/SI/AD4
PF1/SO/AD5
PF2/
/AD6
PF3/
/AD7
SCK
INT
4
I/O
Identical to those for PA0 to
PA3.
Identical to those
for PA0 to PA3.
The serial port
functions are
disabled.
The interrupt
source is set to
INT.
Identical to
those for
PA0 to PA3.
RES
1
Input
-
-
-
TEST
1
Input
-
-
This pin
must be
connected to
VSS.
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參數描述
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