參數(shù)資料
型號: LAMXO1200E-3FTN256E
廠商: Lattice Semiconductor Corporation
文件頁數(shù): 74/77頁
文件大?。?/td> 0K
描述: IC FPGA AUTO 1.2KLUTS 256BGA
標準包裝: 90
系列: LA-MachXO
可編程類型: 系統(tǒng)內可編程
最大延遲時間 tpd(1): 5.1ns
電壓電源 - 內部: 1.14 V ~ 1.26 V
宏單元數(shù): 600
輸入/輸出數(shù): 211
工作溫度: -40°C ~ 125°C
安裝類型: 表面貼裝
封裝/外殼: 256-LBGA
供應商設備封裝: 256-FTBGA(17x17)
包裝: 托盤
其它名稱: 220-1636
LAMXO1200E-3FTN256E-ND
November 2007
Data Sheet DS1003
2007 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal. All other brand
or product names are trademarks or registered trademarks of their respective holders. The specications and information herein are subject to change without notice.
www.latticesemi.com
6-1
DS1003 Further Information_01.1
For Further Information
A variety of technical notes for the LA-MachXO family are available on the Lattice web site at www.latticesemi.com.
MachXO sysIO Usage Guide (TN1091)
MachXO sysCLOCK PLL Design and Usage Guide (TN1089)
MachXO Memory Usage Guide (TN1092)
Power Estimation and Management for MachXO Devices (TN1090)
MachXO JTAG Programming and Conguration User’s Guide (TN1086)
Minimizing System Interruption During Conguration Using TransFR Technology (TN1087)
MachXO Density Migration (TN1097)
IEEE 1149.1 Boundary Scan Testability in Lattice Devices
For further information on interface standards refer to the following web sites:
JEDEC Standards (LVTTL, LVCMOS): www.jedec.org
PCI: www.pcisig.com
LA-MachXO Automotive Family Data Sheet
Supplemental Information
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