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參數(shù)資料
| 型號： | LA7583 |
| 元件分類： | 接收器 |
| 英文描述： | AUDIO/VIDEO DEMODULATOR, PDIP24 |
| 封裝： | SDIP-24 |
| 文件頁數(shù)： | 3/16頁 |
| 文件大小： | 201K |
| 代理商： | LA7583 |
Continued from preceding page.
Pin
No.
Symbol
Circuit Configuration
Description
17
EQUALIZER INPUT
Pin 17 is the equalizer amplifier input pin. A
signal which has passed through a 4.5 MHz
trap is input through pin 17 and is output
through pin 19.
.
The input level of pin 17 is 1.5 Vp-p. This
is amplified 3 dB to 2 Vp-p by the
equalizer amplifier.
18
EQUALIZER FILTER
Pin 18 is the equalizer pin. The equalizer
amplifier is of the voltage follower type with
a voltage gain of 3 dB. To correct the
frequency characteristics, connect LCR
externally.
The operating characteristics are as follows:
Av =
Ve
Vi
=1+
R1
Z
(times)
19
EQUALIZER
OUTPUT
Pin 19 is the equalizer amplifier output pin.
This output has a built-in low-impedance
drive circuit.
Continued on next page.
LA7583
No.5177-11/16
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