參數(shù)資料
型號： L6701TR
廠商： STMICROELECTRONICS
元件分類： 穩(wěn)壓器
英文描述： 1.5 A SWITCHING REGULATOR, 110 kHz SWITCHING FREQ-MAX, PDSO36
封裝： LEAD FREE, SSO-36
文件頁數(shù)： 14/44頁
文件大?。?/td> 627K
代理商： L6701TR
Obsolete
Product(s)
- Obsolete
Product(s)
L6701
10 Output Voltage Positioning
21/44
10
Output Voltage Positioning
Output voltage positioning is performed by selecting the reference DAC and by programming
the Droop Function and Offset to the reference (See Figure 7). The current (IDROOP) sourced
from the FB pin, directly proportional to the read current, causes the output voltage to vary
according to the external RFB resistor so implementing the desired load-line resistance. The
current (IOS) sourced from the REF_IN pin causes the reference voltage to be offset according
to the resistance RFB connected.
The output voltage is then driven by the following relationship:
Both DROOP and OFFSET function can be disabled: see Section 10.1 and Section 10.3 for
details.
Figure 7.
Voltage Positioning
10.1
Load-Line (Droop Function - Optional)
This method "recovers" part of the drop due to the output capacitor ESR in the load transient,
introducing a dependence of the output voltage on the load current: a static error proportional to
the output current causes the output voltage to vary according to the sensed current.
Figure 8 shows the typical Current-Sense Circuit used to implement the Droop-Function in low-
cost application (saves component count). The current flowing across the three inductors is
read through the RPH - CPH filter across CS+ and CS- pins. RD programs a trans-conductance
gain and generates a current ICS proportional to the average of the currents of the three
phases. The current ICS is then mirrored and, multiplied by three, sourced by the FB pin
(IDROOP). RFB gives the final gain to program the desired load-line slope.
Considering the scheme reported on Figure 8, it is possible to observe that:
Time constant matching between the inductor (L / DCR) and the current reading filter
(
) is required to implement a real equivalent output impedance of the system so
avoiding over and/or under shoot of the output voltage as a consequence of a load transient. It
results:
V
OUT
VID
R
OS
I
OS
R
FB
I
DR O OP
–
+
=
I DR
OOP
VID
FB
COMP
VSEN
64k
FBR
FBG
64k
RF
CF
RFB
To Vcore
(Remote Sense)
REF_IN
REF_OUT
I OS
ROS
COS
I
CS
I
OUT
3
------------
1s L
DCR
+
1s R
PH
C
PH
3
+
----------------------------------------------------
DCR
R
D
-------------
=
R
PH
C
PH 3
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