參數(shù)資料
型號: L6563
廠商: STMICROELECTRONICS
元件分類: 穩(wěn)壓器
英文描述: 0.003 A POWER FACTOR CONTROLLER WITH POST REGULATOR, PDSO14
封裝: LEAD FREE, SOP-14
文件頁數(shù): 11/39頁
文件大?。?/td> 745K
代理商: L6563
L6563 - L6563A
Application information
19/39
Figure 35. Voltage feedforward: squarer-divider (1/V2) block diagram and transfer
characteristic
In this way a change of the line voltage will cause an inversely proportional change of the
half sine amplitude at the output of the multiplier (if the line voltage doubles the amplitude of
the multiplier output will be halved and vice versa) so that the current reference is adapted to
the new operating conditions with (ideally) no need for invoking the slow dynamics of the
error amplifier. Additionally, the loop gain will be constant throughout the input voltage
range, which improves significantly dynamic behavior at low line and simplifies loop design.
Actually, deriving a voltage proportional to the RMS line voltage implies a form of integration,
which has its own time constant. If it is too small the voltage generated will be affected by a
considerable amount of ripple at twice the mains frequency that will cause distortion of the
current reference (resulting in high THD and poor PF); if it is too large there will be a
considerable delay in setting the right amount of feedforward, resulting in excessive
overshoot and undershoot of the pre-regulator's output voltage in response to large line
voltage changes. Clearly a trade-off is required.
The device realizes Voltage Feedforward with a technique that makes use of just two
external parts and that limits the feedforward time constant trade-off issue to only one
direction. A capacitor CFF and a resistor RFF , both connected from the VFF (pin 5) pin to
ground, complete an internal peak-holding circuit that provides a DC voltage equal to the
peak of the rectified sine wave applied on pin MULT (pin 3). RFF provides a means to
discharge CFF when the line voltage decreases (see Figure 35). In this way, in case of
sudden line voltage rise, CFF will be rapidly charged through the low impedance of the
internal diode and no appreciable overshoot will be visible at the pre-regulator's output; in
case of line voltage drop CFF will be discharged with the time constant RFFCFF, which can
be in the hundred ms to achieve an acceptably low steady-state ripple and have low current
distortion; consequently the output voltage can experience a considerable undershoot, like
in systems with no feedforward compensation.
0
1234
0
0.5
1
1.5
2
VFF=VMULT
Vcsx
0.5
VCOMP=4V
Actual
Ideal
5
MULT
3
R5
Rectified mains
R6
"ideal" diode
current
reference
(Vcsx)
9.5V
VFF
CFF
RFF
E/A output
(VCOMP)
-
+
1/V
2
MULTIPLIER
L6563
L6563A
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