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參數(shù)資料
| 型號(hào)： | L6260 |
| 廠商： | 意法半導(dǎo)體 |
| 英文描述： | 4.5 - 5.5V DISK DRIVER SPINDLE & VCM, POWER & CONTROL COMBO’S |
| 中文描述： | 4.5 - 5.5V的磁盤驅(qū)動(dòng)程序主軸 |
| 文件頁數(shù)： | 3/30頁 |
| 文件大?。?/td> | 305K |
| 代理商： | L6260 |
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PIN DESCRIPTION
Pin Types:I = Input,O = Output,P = Power, A = Analog(passive)
Power
PIN #
PIN NAME
DESCRIPTION
PIN
TYPE
AI
AI
AI
AI
AI
AI
AI
AI
AI
AI
AI
AI
AI
AI
AI
AI
I\O
MAPPED
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
TRI-STATE
@SLEEP/@POR
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
8
41
54
58
23
31
1
VDC
VCC
VVCM_1
VVCM_2
VSPIN_1
VSPIN_2
GND
GND
GND
GND
SPN_GND_1
SPN_GND_2
DAC_GND
AGND
DIG_GND
TRIPGND
Digital power. Positive nominally 5V or 3V
Analog power. Positive nominally 5V or 3V
VCM power supply. Positive nominally 5V or 3V
Same as above
Spindle power pin. Positive nominally 5V or 3V
Same as above
Ground
Ground
Ground
Ground
Ground forspindle circuit
As above
Ground forall DACs
Analog ground
Digital ground
Voltage triplerground
15-17
32-34
47-49
18
27
44
45
7
63
Serial Interface& Test Pins
PIN #
PIN NAME
DESCRIPTION
PIN
TYPE
DI
I\O
MAPPED
Yes
TRI-STATE
@SLEEP/@POR
No
12
FCLCK
System clock. 4-12MHz selectable via the
CLK_PRESCALE bit inthe System Control Register
B (Reg 4 Bit 4).
Serial port data I/O running up to 10MHz. For full
details of all serial port signals see the Circuit
Description section.
Serial port clock (max 10Mbits/s)
Read / Write signal for serial interface
Chip select input.
Used to enable one of the test modes. The mode is
selcted in conjunction with the TRISTATE pin (see
below for more details).
Used to enable one of the test modes. The mode is
selcted in conjunction with the TEST pin (see below
for more details). This pin has no effect on the
spindle or VCM drivers, this is a test pin only.
Analog test pin. This pin carries the required analog
signal to allow external testing.
Digital TestOutput Pin. This pin also doubles as the
Clock input if an external FLL is used.
11
SDIO
DI/O
Yes
Yes
10
19
9
21
SCLK
R/W
SLOAD
TEST
DI
DI
DI
DI
Yes
Yes
Yes
No
No
No
No
No
24
TRISTATE
DI
No
No
60
ATEST
AO
No
No
26
DTEST
DI/O
No
No
Test Mode
TEST pin TRISTATEpin
1
1
1
0
0
IOMAPPING Test
DIGITAL Test*
ANALOG Test*
TRISTATE Test
Normal Operation (non
test mode)
0
1
1
1
0
For a detailed description please refer to the Test
Circuit section of the CIRCUIT OPERATION por-
tion of this datasheet
* These two testmodes operate simultaneously through separate
test pins (ATEST and DTEST).
L6260
3/30
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