參數(shù)資料
型號(hào)： KSZ8995FQ
廠商： Micrel Inc
文件頁(yè)數(shù)： 14/89頁(yè)
文件大?。?/td> 0K
描述： IC SWITCH 10/100 5PORT 128-PQFP
標(biāo)準(zhǔn)包裝： 66
系列： *
產(chǎn)品目錄頁(yè)面： 1081 (CN2011-ZH PDF)
配用： 576-3872-ND - BOARD EVALUATION FOR KSZ8995FQ
其它名稱(chēng)： 576-3077
Micrel, Inc.
KS8995MA/FQ
October 2011
21
M9999-102611-3.0
Pin Description
By Name (Continued)
Pin Number
Pin Name
Type
(1)
Port
Pin Function
(2)
97
LED3-1
Ipu/O
3
LED indicator 1.
96
LED3-2
Ipu/O
3
LED indicator 2.
95
LED4-0
Ipu/O
4
LED indicator 0.
94
LED4-1
Ipu/O
4
LED indicator 1.
93
LED4-2
Ipu/O
4
LED indicator 2.
92
LED5-0
Ipu/O
5
LED indicator 0.
91
LED5-1
Ipu/O
5
LED indicator 1. Strap option: PU (default) = enable PHY MII I/F PD: tristate all PHY
MII output. See “Pin 86 SCONF1.”
90
LED5-2
Ipu/O
5
LED indicator 2. Strap option: aging setup. See “Aging” section. (default) = aging
enable; PD = aging disable.
107
MDC
Ipu
All
Switch or PHY[5] MII management data clock.
108
MDIO
I/O
All
Switch or PHY[5] MII management data I/O.
1
MDI-XDIS
Ipd
1-5
Disable auto MDI/MDI-X.
45
MUX1
NC
Factory test pins. MUX1 and MUX2 should be left unconnected for normal operation.
46
MUX2
NC
Mode
MUX1
MUX2
Normal Operation
NC
68
PCOL
Ipd/O
5
PHY[5] MII collision detect/force flow control. See “Register 18.” For port 4 only. PD
(default) = no force flow control. PU = force flow control.
67
PCRS
Ipd/O
5
PHY[5] MII carrier sense/force duplex mode. See “Register 28.” For port 4 only. PD
(default) = force half-duplex if auto-negotiation is disabled or fails. PU = force full-
duplex if auto-negotiation is disabled or fails.
60
PMRXC
O
5
PHY[5] MII receive clock. PHY mode MII.
65
PMRXD0
Ipd/O
5
PHY[5] MII receive bit 0. Strap option: PD (default) = disable aggressive back-off
algorithm in half-duplex mode; PU = enable for performance enhancement.
64
PMRXD1
Ipd/O
5
PHY[5] MII receive bit 1. Strap option: PD (default) = drop excessive collision packets;
PU = does not drop excessive collision packets.
63
PMRXD2
Ipd/O
5
PHY[5] MII receive bit 2. Strap option: PD (default) = disable back pressure; PU =
enable back pressure.
62
PMRXD3
Ipd/O
5
PHY[5] MII receive bit 3. Strap option: PD (default) = enable flow control; PU =
disable flow control.
61
PMRXDV
Ipd/O
5
PHY[5] MII receive data valid.
Notes:
1.
P = Power supply.
I = Input.
O = Output.
I/O = Bidirectional.
GND = Ground.
Ipu = Input w/internal pull-up.
Ipd = Input w/internal pull-down.
Ipd/O = Input w/internal pull-down during reset, output pin otherwise.
Ipu/O = Input w/internal pull-up during reset, output pin otherwise.
NC = No connect.
2.
PU = Strap pin pull-up.
PD = Strap pull-down.
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參數(shù)描述
KSZ8995FQ-EVAL 功能描述:以太網(wǎng)開(kāi)發(fā)工具 Integrated 5-Port Switch with Fiber on Port 3 & 4 Evaluation Board RoHS:否 制造商:Micrel 產(chǎn)品:Evaluation Boards 類(lèi)型:Ethernet Transceivers 工具用于評(píng)估:KSZ8873RLL 接口類(lèi)型:RMII 工作電源電壓:
KSZ8995FQI 功能描述:以太網(wǎng) IC 5 Port 10/100 Switch with PHY and Frame Buffers (Lead Free) RoHS:否 制造商:Micrel 產(chǎn)品:Ethernet Switches 收發(fā)器數(shù)量:2 數(shù)據(jù)速率:10 Mb/s, 100 Mb/s 電源電壓-最大:1.25 V, 3.45 V 電源電壓-最小:1.15 V, 3.15 V 最大工作溫度:+ 85 C 封裝 / 箱體:QFN-64 封裝:Tray
KSZ8995M 功能描述:以太網(wǎng) IC 5 Port 10/100 Switch with PHY and Frame Buffers (Lead Free) RoHS:否 制造商:Micrel 產(chǎn)品:Ethernet Switches 收發(fā)器數(shù)量:2 數(shù)據(jù)速率:10 Mb/s, 100 Mb/s 電源電壓-最大:1.25 V, 3.45 V 電源電壓-最小:1.15 V, 3.15 V 最大工作溫度:+ 85 C 封裝 / 箱體:QFN-64 封裝:Tray
KSZ8995MA 功能描述:以太網(wǎng) IC 5 Port 10/100 Switch with PHY and Frame Buffers (Lead Free) RoHS:否 制造商:Micrel 產(chǎn)品:Ethernet Switches 收發(fā)器數(shù)量:2 數(shù)據(jù)速率:10 Mb/s, 100 Mb/s 電源電壓-最大:1.25 V, 3.45 V 電源電壓-最小:1.15 V, 3.15 V 最大工作溫度:+ 85 C 封裝 / 箱體:QFN-64 封裝:Tray
KSZ8995MA4 功能描述:IC SWITCH 5-PORT 10/100 128PQFP RoHS:是 類(lèi)別:集成電路 (IC) >> 專(zhuān)用 IC 系列:* 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:1 系列:- 類(lèi)型:調(diào)幀器 應(yīng)用:數(shù)據(jù)傳輸 安裝類(lèi)型:表面貼裝 封裝/外殼:400-BBGA 供應(yīng)商設(shè)備封裝:400-PBGA（27x27） 包裝:散裝
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