參數(shù)資料
型號： KSZ8873MLLJ
廠商： Micrel Inc
文件頁數(shù)： 60/108頁
文件大?。?/td> 0K
描述： IC ETHERNET SWITCH 3PORT 64LQFP
特色產品： KSZ8873MLLJ Ethernet Switches
標準包裝： 160
系列： *
其它名稱： 576-3996
Micrel, Inc.
KSZ8873MLLJ
September 2011
55
M9999-091911-1.8
Port Registers (Registers 16 – 95)
The following registers are used to enable features that are assigned on a per port basis. The register bit assignments are
the same for all ports, but the address for each port is different, as indicated.
Register 16 (0x10): Port 1 Control 0
Register 32 (0x20): Port 2 Control 0
Register 48 (0x30): Port 3 Control 0
Bit
Name
R/W
Description
Default
7
Broadcast
Storm
Protection
Enable
R/W
=1, Enable broadcast storm protection for ingress packets on port
=0, Disable broadcast storm protection
0
6
DiffServ
Priority
Classification
Enable
R/W
=1, Enable DiffServ priority classification for ingress packets (IPv4) on
port
=0, Disable DiffServ function
0
5
802.1p
Priority
Classification
Enable
R/W
=1, Enable 802.1p priority classification for ingress packets on port
=0, Disable 802.1p
0
4-3
Port-based
Priority
Classification
R/W
=00, Ingress packets on port will be
classified as priority 0 queue if “Diffserv” or “802.1p” classification is not
enabled or fails to classify.
=01, Ingress packets on port will be
classified as priority 1 queue if “Diffserv” or “802.1p” classification is not
enabled or fails to classify.
=10, Ingress packets on port will be
classified as priority 2 queue if “Diffserv” or “802.1p” classification is not
enabled or fails to classify.
=11, Ingress packets on port will be
classified as priority 3 queue if “Diffserv” or “802.1p” classification is not
enabled or fails to classify.
Note: “DiffServ”, “802.1p” and port priority can be enabled at the same
time. The OR’ed result of 802.1p and DSCP overwrites the port priority.
00
2
Tag Insertion
R/W
=1, When packets are output on the port, the switch will add 802.1p/q
tags to packets without 802.1p/q tags when received. The switch will not
add tags to packets already tagged. The tag inserted is the ingress
port’s “port VID”.
=0, Disable tag insertion
0
1
Tag
Removal
R/W
=1, When packets are output on the port, the switch will remove
802.1p/q tags from packets with 802.1p/q tags when received. The
switch will not modify packets received without tags.
=0, Disable tag removal
0
TXQ Split
Enable
R/W
=1, Split TXQ to 4 queue configuration. It cannot be enable at the same
time with split 2 queue at register 18, 34,50 bit 7.
=0, No split, treated as 1 queue configuration
0
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KSZ8873MML-EVAL 功能描述:以太網(wǎng)開發(fā)工具 3-Port Fast Ethernet Switch with 2x MII Interface - Evaluation Board RoHS:否 制造商:Micrel 產品:Evaluation Boards 類型:Ethernet Transceivers 工具用于評估:KSZ8873RLL 接口類型:RMII 工作電源電壓:
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KSZ8873RLL-EVAL 功能描述:以太網(wǎng)開發(fā)工具 3-Port Fast Ethernet Switch with 1x RMII Interface - Evalaution Board RoHS:否 制造商:Micrel 產品:Evaluation Boards 類型:Ethernet Transceivers 工具用于評估:KSZ8873RLL 接口類型:RMII 工作電源電壓:
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