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參數(shù)資料
| 型號： | KSZ8041NL-EVAL |
| 廠商： | Micrel Inc |
| 文件頁數(shù)： | 20/54頁 |
| 文件大?。?/td> | 0K |
| 描述： | BOARD EVALUATION FOR KSZ8041NL |
| 標準包裝： | 1 |
| 主要目的： | 接口，以太網(wǎng) PHY |
| 嵌入式： | 否 |
| 已用 IC / 零件： | KSZ8041NL |
| 主要屬性： | 單芯片 PHY，10BASE-T/100BASE-TX |
| 次要屬性： | MII，RMII，HP 自動 MDI，MDI-X 自動極性校正 |
| 已供物品： | 板 |
| 產(chǎn)品目錄頁面： | 1114 (CN2011-ZH PDF) |
| 相關(guān)產(chǎn)品： | 576-3296-5-ND - IC TXRX PHY 10/100 AUTO 32-MLF 576-2109-6-ND - IC TXRX PHY 10/100 LV/LP 32-MLF 576-2109-1-ND - IC TXRX PHY 10/100 LV/LP 32-MLF 576-2109-2-ND - IC TXRX PHY 10/100 LV/LP 32-MLF KSZ8041NLA3TR-ND - TRANSCEIVER 10/100 32-MLF 576-1645-6-ND - IC TXRX PHY 10/100 LV/LP 32-MLF 576-1645-1-ND - IC TXRX PHY 10/100 LV/LP 32-MLF 576-1645-2-ND - IC TXRX PHY 10/100 LV/LP 32-MLF |
| 其它名稱： | 576-1621 |
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Micrel, Inc.
KSZ8041NL/RNL
September 2010
27
M9999-090910-1.4
Carrier Sense/Receive Data Valid (CRS_DV)
CRS_DV is asserted by the PHY when the receive medium is non-idle. It is asserted asynchronously on detection of
carrier. This is when squelch is passed in 10Mbps mode, and when 2 non-contiguous zeroes in 10 bits are detected in
100Mbps mode. Loss of carrier results in the de-assertion of CRS_DV.
So long as carrier detection criteria are met, CRS_DV remains asserted continuously from the first recovered di-bit of the
frame through the final recovered di-bit, and it is negated prior to the first REF_CLK that follows the final di-bit. The data
on RXD[1:0] is considered valid once CRS_DV is asserted. However, since the assertion of CRS_DV is asynchronous
relative to REF_CLK, the data on RXD[1:0] is "00" until proper receive signal decoding takes place.
Receive Data [1:0] (RXD[1:0])
RXD[1:0] transitions synchronously to REF_CLK. For each clock period in which CRS_DV is asserted, RXD[1:0] transfers
two bits of recovered data from the PHY. RXD[1:0] is "00" to indicate idle when CRS_DV is de-asserted. Values other
than “00” on RXD[1:0] while CRS_DV is de-asserted are ignored by the MAC.
Receive Error (RX_ER)
RX_ER is asserted for one or more REF_CLK periods to indicate that a Symbol Error (e.g. a coding error that a PHY is
capable of detecting, and that may otherwise be undetectable by the MAC sub-layer) was detected somewhere in the
frame presently being transferred from the PHY.
RX_ER transitions synchronously with respect to REF_CLK. While CRS_DV is de-asserted, RX_ER has no effect on the
MAC.
Collision Detection
The MAC regenerates the COL signal of the MII from TX_EN and CRS_DV.
RMII Signal Diagram
The KSZ8041NL RMII pin connections to the MAC are shown in Figure 2.
Figure 2. KSZ8041NL RMII Interface
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| KSZ8041NLI | 制造商:Micrel Inc 功能描述:IC TXRX PHY 10/100 LV/LP 32-MLF*NIC* |
| KSZ8041NLI TR | 功能描述:以太網(wǎng) IC Physical Layer Transceiver 10/100BASE-T/TX (Lead Free) RoHS:否 制造商:Micrel 產(chǎn)品:Ethernet Switches 收發(fā)器數(shù)量:2 數(shù)據(jù)速率:10 Mb/s, 100 Mb/s 電源電壓-最大:1.25 V, 3.45 V 電源電壓-最小:1.15 V, 3.15 V 最大工作溫度:+ 85 C 封裝 / 箱體:QFN-64 封裝:Tray |
| KSZ8041NLITR | 制造商:Micrel 功能描述:Physical Layer Transceiver 1Ch 100Mbps |
| KSZ8041NLI-TR | 功能描述:1/1 Transceiver Full MII, RMII 32-MLF? (5x5) 制造商:microchip technology 系列:- 包裝:剪切帶（CT） 零件狀態(tài):有效 類型:收發(fā)器 協(xié)議:MII，RMII 驅(qū)動器/接收器數(shù):1/1 雙工:全 接收器滯后:- 數(shù)據(jù)速率:- 電壓 - 電源:3.135 V ~ 3.465 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:32-VFQFN 裸露焊盤，32-MLF? 供應(yīng)商器件封裝:32-MLF?（5x5） 標準包裝:1 |
| KSZ8041NLJ | 制造商:MICREL 制造商全稱:Micrel Semiconductor 功能描述:10/100 Ethernet Transceiver with Extended Temperature Support |
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