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Micrel, Inc.
KSZ8041TL/FTL
April 2007
26
M9999-042707-1.1
The following figure and table shows the receive data/control format for each segment:
CRS
RX_DV
RXD0
RXD1
RXD2
RXD3
RXD4
RXD5
RXD6
RXD7
CLOCK
SYNC
RX
Figure 3. SMII Receive Data/Control Segment
SMII RX Bit
Description
CRS
Carrier Sense
RX_DV
Receive Data Valid
RXD[0:7]
Encoded Data
See SMII RXD[0:7] Encoding Table (below)
Table 7. SMII RX Bit Description
CRS
RX_DV
RXD0
RXD1
RXD2
RXD3
RXD4
RXD5
RXD6
RXD7
X
0
RX_ER
from
pervious
frame
Speed
0=10M
1=100M
Duplex
0=Half
1=Full
Link
0=Down
1=Up
Jabber
0=No
1=Yes
Upper
Nibble
0=Invalid
1=Valid
False
Carrier
Detected
1
X
1
One Data Byte
Table 8. SMII RXD[0:7] Encoding Table
Collision Detection
Collisions occur when CRS and TX_EN are simultaneously asserted. The MAC regenerates the MII collision signal from
CRS and TX_EN.