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    參數(shù)資料
    型號(hào): KMPC852TCVR100A
    廠商: Freescale Semiconductor
    文件頁(yè)數(shù): 8/80頁(yè)
    文件大?。?/td> 0K
    描述: IC MPU PWRQUICC 100MHZ 256PBGA
    標(biāo)準(zhǔn)包裝: 2
    系列: MPC8xx
    處理器類型: 32-位 MPC8xx PowerQUICC
    速度: 100MHz
    電壓: 1.8V
    安裝類型: 表面貼裝
    封裝/外殼: 256-BGA
    供應(yīng)商設(shè)備封裝: 256-PBGA(23x23)
    包裝: 托盤(pán)
    MPC852T PowerQUICC Hardware Specifications, Rev. 4
    16
    Freescale Semiconductor
    Bus Signal Timing
    B15
    CLKOUT to TEA High-Z
    (MIN = 0.00
    × B1 + 2.50)
    2.50
    15.00
    2.50
    15.00
    2.50
    15.00
    2.50
    15.00
    ns
    B16
    TA, BI valid to CLKOUT (setup time)
    (MIN = 0.00
    × B1 + 6.00)
    6.00
    6.00
    6.00
    6.00
    ns
    B16a
    TEA, KR, RETRY, CR valid to CLKOUT
    (setup time) (MIN = 0.00
    × B1 + 4.5)
    4.50
    4.50
    4.50
    4.50
    ns
    B16b
    BB, BG, BR, valid to CLKOUT (setup time)
    3 (4MIN = 0.00 × B1 +.000)
    4.00
    4.00
    4.00
    4.00
    ns
    B17
    CLKOUT to TA, TEA, BI, BB, BG, BR valid
    (hold time) (MIN = 0.00
    × B1 + 1.004)
    1.00
    1.00
    1.00
    2.00
    ns
    B17a
    CLKOUT to KR, RETRY, CR valid (hold
    time) (MIN = 0.00
    × B1 + 2.00)
    2.00
    2.00
    2.00
    2.00
    ns
    B18
    D(0:31), DP(0:3) valid to CLKOUT rising
    edge (setup time)5
    (MIN = 0.00
    × B1 + 6.00)
    6.00
    6.00
    6.00
    6.00
    ns
    B19
    CLKOUT rising edge to D(0:31), DP(0:3)
    valid (hold time)5 (MIN = 0.00
    × B1 + 1.006)
    1.00
    1.00
    1.00
    2.00
    ns
    B20
    D(0:31), DP(0:3) valid to CLKOUT falling
    edge (setup time)7
    (MIN = 0.00
    × B1 + 4.00)
    4.00
    4.00
    4.00
    4.00
    ns
    B21
    CLKOUT falling edge to D(0:31), DP(0:3)
    valid (hold Time)7 (MIN = 0.00
    × B1 + 2.00)
    2.00
    2.00
    2.00
    2.00
    ns
    B22
    CLKOUT rising edge to CS asserted
    GPCM ACS = 00 (MAX = 0.25
    × B1 + 6.3)
    7.60
    13.80
    6.30
    12.50
    5.00
    11.30
    3.80
    10.00
    ns
    B22a
    CLKOUT falling edge to CS asserted
    GPCM ACS = 10, TRLX = 0
    (MAX = 0.00
    × B1 + 8.00)
    8.00
    8.00
    8.00
    8.00
    ns
    B22b
    CLKOUT falling edge to CS asserted
    GPCM ACS = 11, TRLX = 0, EBDF = 0
    (MAX = 0.25
    × B1 + 6.3)
    7.60
    13.80
    6.30
    12.50
    5.00
    11.30
    3.80
    10.00
    ns
    B22c
    CLKOUT falling edge to CS asserted
    GPCM ACS = 11, TRLX = 0, EBDF = 1
    (MAX = 0.375
    × B1 + 6.6)
    10.90
    18.00
    10.90
    16.00
    7.00
    14.10
    5.20
    12.30
    ns
    B23
    CLKOUT rising edge to CS negated
    GPCM read access, GPCM write access
    ACS = 00, TRLX = 0 & CSNT = 0
    (MAX = 0.00
    × B1 + 8.00)
    2.00
    8.00
    2.00
    8.00
    2.00
    8.00
    2.00
    8.00
    ns
    B24
    A(0:31) and BADDR(28:30) to CS
    asserted GPCM ACS = 10, TRLX = 0
    (MIN = 0.25
    × B1 – 2.00)
    5.60
    4.30
    3.00
    1.80
    ns
    Table 9. Bus Operation Timings (continued)
    Num
    Characteristic
    33 MHz
    40 MHz
    50 MHz
    66 MHz
    Unit
    Min
    Max
    Min
    Max
    Min
    Max
    Min
    Max
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