參數(shù)資料
型號(hào): KMC7448HX1400ND
廠商: Freescale Semiconductor
文件頁(yè)數(shù): 18/60頁(yè)
文件大小: 0K
描述: IC MPU 128BIT 1400MHZ 360-FCCBGA
標(biāo)準(zhǔn)包裝: 1
系列: MPC74xx
處理器類(lèi)型: 32-位 MPC74xx PowerPC
速度: 1.4GHz
電壓: 1.15V
安裝類(lèi)型: 表面貼裝
封裝/外殼: 360-BCBGA,F(xiàn)CCBGA
供應(yīng)商設(shè)備封裝: 360-FCCBGA(25x25)
包裝: 托盤(pán)
MPC7448 RISC Microprocessor Hardware Specifications, Rev. 4
Freescale Semiconductor
25
Pinout Listings
7
Pinout Listings
Table 11 provides the pinout listing for the MPC7448, 360 HCTE package. The pinouts of the MPC7448
and MPC7447A are compatible, but the requirements regarding the use of the additional power and ground
pins have changed. The MPC7448 requires these pins be connected to the appropriate power or ground
plane to achieve high core frequencies; see Section 9.3, “Connection Recommendations,for additional
information. As a result, these pins should be connected in all new designs.
Additionally, the MPC7448 may be populated on a board designed for a MPC7447 (or MPC7445 or
MPC7441), provided the core voltage can be made to match the requirements in Table 4 and all pins
defined as ‘no connect’ for the MPC7447 are unterminated, as required by the MPC7457 RISC
Microprocessor Hardware Specifications. The MPC7448 uses pins previously marked ‘no connect’ for the
temperature diode pins and for additional power and ground connections. The additional power and
ground pins are required to achieve high core frequencies and core frequency will be limited if they are
not connected; see Section 9.3, “Connection Recommendations,for additional information. Because
these ‘no connect’ pins in the MPC7447 360 pin package are not driven in functional mode, an MPC7447
can be populated in an MPC7448 board.
NOTE
Caution must be exercised when performing boundary scan test operations
on a board designed for an MPC7448, but populated with an MPC7447 or
earlier device. This is because in the MPC7447 it is possible to drive the
latches associated with the former ‘no connect’ pins in the MPC7447,
potentially causing contention on those pins. To prevent this, ensure that
these pins are not connected on the board or, if they are connected, ensure
that the states of internal MPC7447 latches do not cause these pins to be
driven during board testing.
For the MPC7448, pins that were defined as the TEST[0:4] factory test signal group on the MPC7447A
and earlier devices have been assigned new functions. For most of these, the termination recommendations
for the TEST[0:4] pins of the MPC7447A are compatible with the MPC7448 and will allow correct
operation with no performance loss. The exception is BVSEL1 (TEST3 on the MPC7447A and earlier
devices), which may require a different termination depending which I/O voltage mode is desired; see
Table 3 for more information.
NOTE
This pinout is not compatible with the MPC750, MPC7400, or MPC7410
360 BGA package.
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