參數(shù)資料
型號: KM48V8104B
廠商: SAMSUNG SEMICONDUCTOR CO. LTD.
英文描述: 8M x 8bit CMOS Dynamic RAM with Extended Data Out
中文描述: 8米× 8位的CMOS動態(tài)隨機(jī)存儲器的擴(kuò)展數(shù)據(jù)輸出
文件頁數(shù): 4/21頁
文件大小: 386K
代理商: KM48V8104B
KM48V8004B,
KM48V8104B
CMOS DRAM
*Note :
I
CC1
, I
CC3
, I
CC4
and I
CC6
are dependent on output loading and cycle rates. Specified values are obtained with the output open.
I
CC
is specified as an average current. In I
CC1
, I
CC3
and I
CC6,
address can be changed maximum once while RAS=V
IL
. In I
CC4
,
address can be changed maximum once within one EDO mode cycle time,
t
HPC
.
DC AND OPERATING CHARACTERISTICS
(Continued)
I
CC1
* : Operating Current (RAS and CAS, Address cycling @
t
RC
=min.)
I
CC2
: Standby Current (RAS=CAS=W=V
IH
)
I
CC3
* : RAS-only Refresh Current (CAS=V
IH
, RAS cycling @
t
RC
=min.)
I
CC4
* : Extended Data Out Mode Current (RAS=V
IL
, CAS, Address cycling @
t
HPC
=min.)
I
CC5
: Standby Current (RAS=CAS=W=V
CC
-0.2V)
I
CC6
* : CAS-Before-RAS Refresh Current (RAS and CAS cycling @
t
RC
=min)
I
CC7
: Battery back-up current, Average power supply current, Battery back-up mode
Input high voltage(V
IH
)=V
CC
-0.2V, Input low voltage(V
IL
)=0.2V, CAS=CAS-before-RAS cycling or 0.2V
W, OE=V
IH
, Address=Don
t care, DQ=Open, T
RC
=31.25us
I
CCS
: Self Refresh Current
RAS=CAS=0.2V, W=OE=A0 ~ A12(A11)=V
CC
-0.2V or 0.2V, DQ0 ~ DQ7=V
CC
-0.2V, 0.2V or Open
Symbol
Power
Speed
Max
Units
KM48V8004B
KM48V8104B
I
CC1
Don
t care
-45
-5
-6
100
90
80
130
120
110
mA
mA
mA
I
CC2
Normal
L
Don
t care
2
2
2
2
mA
mA
I
CC3
Don
t care
-45
-5
-6
100
90
80
130
120
110
mA
mA
mA
I
CC4
Don
t care
-45
-5
-6
110
100
90
120
110
100
mA
mA
mA
I
CC5
Normal
L
Don
t care
500
300
500
300
uA
uA
I
CC6
Don
t care
-45
-5
-6
100
90
80
130
120
110
mA
mA
mA
I
CC7
L
Don
t care
400
400
uA
I
CCS
L
Don
t care
400
400
uA
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