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參數(shù)資料
| 型號(hào)： | KM23V16000DG |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | 16M-Bit (2Mx8 /1Mx16) CMOS MASK ROM(16M位(2M×8/1M×16) CMOS掩膜ROM) |
| 中文描述： | 1,600位（2Mx8 / 1Mx16）的CMOS掩膜ROM（1,600位（2米× 8/1M × 16）的CMOS掩膜光盤） |
| 文件頁數(shù)： | 3/4頁 |
| 文件大?。?/td> | 85K |
| 代理商： | KM23V16000DG |
KM23V16000D(G)
CMOS MASK ROM
Preliminary
TEST CONDITIONS
Item
Value
Input Pulse Levels
0.45V to 2.4V
Input Rise and Fall Times
10ns
Input and Output timing Levels
1.5V
Output Loads
1 TTL Gate and CL=100pF
AC CHARACTERISTICS (TA=0
°C to +70°C, VCC=3.3V/3.0V±0.3V, unless otherwise noted.)
READ CYCLE
Item
Symbol
KM23V16000D(G)-10
KM23V16000D(G)-12
KM23V16000D(G)-15
Unit
Min
Max
Min
Max
Min
Max
Read Cycle Time
tRC
100
120
150
ns
Chip Enable Access Time
tACE
100
120
150
ns
Address Access Time
tAA
100
120
150
ns
Output Enable Access Time
tOE
50
60
70
ns
Output or Chip Disable to
Output High-Z
tDF
20
30
ns
Output Hold from Address Change
tOH
0
ns
TIMING DIAGRAM
READ
ADD
CE
OE
DOUT
A0~A19
A-1(*1)
D0~D7
D8~D15(*2)
ADD1
ADD2
VALID DATA
tOH
tDF(*3)
tRC
tACE
tOE
tAA
NOTES :
*1. Byte Mode only. A-1 is Least Significant Bit Address.(BHE = VIL)
*2. Word Mode only.(BHE = VIH)
*3. tDF is defined as the time at which the outputs achieve the open circuit condition and is not referenced to V
OH
or VOL level.
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