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參數(shù)資料
| 型號： | KAD5610P-21Q72 |
| 廠商： | Intersil |
| 文件頁數(shù)： | 22/30頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC ADC 10BIT 210MSPS DUAL 72-QFN |
| 產(chǎn)品培訓模塊： | High-Speed Analog-to-Digital Converters |
| 標準包裝： | 1 |
| 系列： | FemtoCharge™ |
| 位數(shù)： | 10 |
| 采樣率（每秒）： | 210M |
| 數(shù)據(jù)接口： | 串行，SPI? |
| 轉(zhuǎn)換器數(shù)目： | 2 |
| 功率耗散（最大）： | 411mW |
| 電壓電源： | 單電源 |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 72-VFQFN 裸露焊盤 |
| 供應商設(shè)備封裝： | 72-QFN（10x10） |
| 包裝： | 托盤 |
| 輸入數(shù)目和類型： | 2 個差分，單極 |
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notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
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FN6810.2
September 10, 2009
.
Revision History
DATE
REVISION
CHANGE
8/6/08
Rev 1
Initial Release of Production Datasheet
12/5/08
FN6810.0
Converted to intersil template. Assigned file number FN6810. Rev 0 - first release with new file number.
Applied Intersil Standards.
1/15/09
FN6810.1
P1; revised Key Specs
P1; changed RESET to RESETN in block diagram
P2; added Part Marking column to Order Info
P4; Moved Thermal Impedance under Thermal Info (used to be on p. 7). Added Theta JA
Note 2.
P4-7; edits throughout the Specs table. Added Notes 8 and 9. Revised Notes 6 and 7.
P7; Removed ESD section
P10-12; revised Performance Curves throughout
P14; User Inititated Reset section; revised 2nd sentence of 1st paragraph
P19; Serial Peripheral Interface; revised 2nd to last sentence of 1st paragraph. SPI Physical Interface;
revised 2nd and 3rd sentences of 4th paragraph
P20; added last 2 sentences to 1st paragraph of "ADDRESS 0X24: GAIN_FINE". Revised Table 8
P21; revised last 2 sentences of "ADDRESS 0X71: PHASE_SLIP". Removed Figure of "PHASE SLIP:
CLK÷2 MODE, fCLOCK = 500MHz"
P24; revised Figure 44
P24; Table 17; revised Bits7:4, Addr C0
Throughout; formatted graphics to Intersil standards
5/14/09
FN6810.2
1)Updated pin diagram ; Added nap mode, sleep mode wake up times to spec table
2) Added CSB,SCLK Setup time specs for nap,sleep modes to spec table
4) Changed SPI setup spec wording in spec table
5) Change to pin description table for clarification
6) Added thermal pad note
8) Update multple device usage note on at “SPI Physical Interface” on page 21
9) Added ‘Reserved’ to SPI memory map at address 25H
10) Added section on “ADC Evaluation Platform” on page 27
11) Intersil standards applied: Added Pb-free bullet in features and pb-free reflow link in thermal
information, added over-temp note reference in spec table.
8/14/09
1. Change to SPI interface section in spec table, timing in cycles now, added write, read specific timing
specs
2. Updated SPI timing diagrams, Figures 36, 37
3. Updated wakeup time description in “Nap/Sleep” on page 17.
4. Removed calibration note in spec table
5) updated user reset section desc.
6) moved label in fig 45
KAD5610P
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| KAD5610P-25Q72 | 功能描述:IC ADC 10BIT 250MSPS DUAL 72-QFN RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:FemtoCharge™ 產(chǎn)品培訓模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:250 系列:- 位數(shù):12 采樣率（每秒）:1.8M 數(shù)據(jù)接口:并聯(lián) 轉(zhuǎn)換器數(shù)目:1 功率耗散（最大）:1.82W 電壓電源:模擬和數(shù)字 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:48-LQFP 供應商設(shè)備封裝:48-LQFP（7x7） 包裝:管件 輸入數(shù)目和類型:2 個單端，單極 |
| KAD5612P | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Dual 12-Bit, 250/210/170/125MSPS A/D Converter |
| KAD5612P_09 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Dual 12-Bit, 250/210/170/125MSPS A/D Converter |
| KAD5612P_0909 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Dual 12-Bit, 250/210/170/125MSPS A/D Converter |
| KAD5612P-12Q72 | 功能描述:IC ADC 12BIT 125MSPS DUAL 72-QFN RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:FemtoCharge™ 產(chǎn)品培訓模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:250 系列:- 位數(shù):12 采樣率（每秒）:1.8M 數(shù)據(jù)接口:并聯(lián) 轉(zhuǎn)換器數(shù)目:1 功率耗散（最大）:1.82W 電壓電源:模擬和數(shù)字 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:48-LQFP 供應商設(shè)備封裝:48-LQFP（7x7） 包裝:管件 輸入數(shù)目和類型:2 個單端，單極 |
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