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參數(shù)資料
| 型號： | K7I643684M-FC20 |
| 元件分類： | SRAM |
| 英文描述： | 2M X 36 DDR SRAM, 0.45 ns, PBGA165 |
| 封裝： | 15 X 17 MM, 1 MM PITCH, FBGA-165 |
| 文件頁數(shù)： | 3/18頁 |
| 文件大?。?/td> | 190K |
| 代理商： | K7I643684M-FC20 |
2Mx36 & 4Mx18 & 8Mx8 DDRII CIO b4 SRAM
- 11 -
Rev 0.1
Mar. 2003
K7I643684M
K7I641884M
K7I640884M
Preliminary
Note: For power-up, V IH
≤ VDDQ+0.3V and VDD ≤ 1.7V and VDDQ ≤ 1.4V t ≤ 200ms
VDDQ
VIL
VDDQ+0.5V
20% tKHKH(MIN)
VSS
VIH
VSS-0.5V
20% tKHKH(MIN)
Undershoot Timing
Overershoot Timing
OPERATING CONDITIONS (0
°C ≤ TA ≤ 70°C)
PARAMETER
SYMBOL
MIN
MAX
UNIT
Supply Voltage
VDD
1.7
1.9
V
VDDQ
1.4
1.9
V
Reference Voltage
V REF
0.68
0.95
V
Ground
VSS
0
V
VDDQ/2
50
SRAM
Zo=50
0.75V
VREF
ZQ
250
AC TEST OUTPUT LOAD
AC TEST CONDITIONS
Note: Parameters are tested with RQ=250
Parameter
Sym-
Value
U
Core Power Supply Voltage
VDD
1.7~1.9
V
Output Power Supply Voltage
VDDQ
1.4~1.9
V
Input High/Low Level
VIH/
1.25/0.25
V
Input Reference Level
V REF
0.75
V
Input Rise/Fall Time
TR/TF
0.3/0.3
n
Output Timing Reference Level
VDDQ/2
V
AC ELECTRICAL CHARACTERISTICS (VDD=1.8V
±0.1V, TA=0°C to +70°C)
Notes: 1. This condition is for AC function test only, not for AC parameter test.
2. To maintain a valid level, the transitioning edge of the input must :
a) Sustain a constant slew rate from the current AC level through the target AC level, VIL(AC) or VIH(AC)
b) Reach at least the target AC level
c) After the AC target level is reached, continue to maintain at least the target DC level, VIL(DC) or V IH(DC)
PARAMETER
SYMBOL
MIN
MAX
UNIT
NOTES
Input High Voltage
VIH (AC)
VREF + 0.2
-
V
1,2
Input Low Voltage
V IL (AC)
-
VREF - 0.2
V
1,2
VDDQ+0.25V
VSS-0.25V
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相關(guān)代理商/技術(shù)參數(shù) |
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