參數(shù)資料
型號(hào): K4T51043QC-ZCLD6
廠商: SAMSUNG SEMICONDUCTOR CO. LTD.
英文描述: CAP 33PF 3000V 5% NP0(C0G) SMD-1808 TR-7 PLATED-NI/SN
中文描述: 葷的512Mb芯片DDR2內(nèi)存
文件頁數(shù): 27/29頁
文件大?。?/td> 629K
代理商: K4T51043QC-ZCLD6
Page 27 of 29
Rev. 1.4 Aug. 2005
DDR2 SDRAM
512Mb C-die DDR2 SDRAM
29. Input waveform timing with differential data strobe enabled MR[bit10]=0, is referenced from the input signal crossing at the V
IH(ac)
level to the differen-
tial data strobe crosspoint for a rising signal, and from the input signal crossing at the V
IL(ac)
level to the differential data strobe crosspoint for a falling sig-
nal applied to the device under test.
30. Input waveform timing with differential data strobe enabled MR[bit10]=0, is referenced from the input signal crossing at the V
IH(dc)
level to the differen-
tial data strobe crosspoint for a rising signal and V
IL(dc)
to the differential data strobe crosspoint for a falling signal applied to the device under test.
tHZ
tRPST end point
T1
T2
VOH + x mV
VOH + 2x mV
VOL + 2x mV
VOL + x mV
tLZ
tRPRE begin point
T2
T1
VTT + 2x mV
VTT + x mV
VTT - x mV
VTT - 2x mV
tLZ,tRPRE begin point = 2*T1-T2
tHZ,tRPST end point = 2*T1-T2
<Test method for tLZ, tHZ, tRPRE and tRPST>
tDS
V
DDQ
V
IH(ac)
min
V
IH(dc)
min
V
REF(dc)
V
IL(dc)
max
V
IL(ac)
max
V
SS
DQS
DQS
tDH
tDS
tDH
Differential Input waveform timing
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