參數(shù)資料
型號(hào): K4J52324KI-HC1A0
元件分類: DRAM
英文描述: 512M X 1 DDR DRAM, 0.2 ns, PBGA136
封裝: HALOGEN FREE AND ROHS COMPLIANT, FBGA-136
文件頁數(shù): 44/61頁
文件大?。?/td> 1364K
代理商: K4J52324KI-HC1A0
- 49 -
K4J52324KI
datasheet
GDDR3 SGRAM
Rev. 1.2
4. AUTO REFRESH and LOAD MODE REGISTER commands may only be issued when all banks are idle.
5. All states and sequences not shown are illegal or reserved.
6. READs or WRITEs listed in the Command/Action column include READs or WRITEs with auto precharge enabled and READs or WRITEs with auto precharge disabled.
7. Requires appropriate DM masking.
From Command
To Command
Minimum delay (with concurrent auto precharge)
WRITE w/AP
READ or READ w/AP
[WL + (BL/2)] tCK + tWR
WRITE or WRITE w/AP
(BL/2) * tCK
PRECHARGE
1 tCK
ACTIVE
1 tCK
READ w/AP
READ or READ w/AP
(BL/2) * tCK
WRITE or WRITE w/AP
[CL + (BL/2)] - WL * tCK + 2 tCK
PRECHARGE
1 tCK
ACTIVE
1 tCK
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