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參數(shù)資料
| 型號(hào)： | JM38510 |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | Internally Trimmed Integrated Circuit Multiplier |
| 中文描述： | 內(nèi)部設(shè)置的集成電路乘數(shù) |
| 文件頁數(shù)： | 4/23頁 |
| 文件大?。?/td> | 620K |
| 代理商： | JM38510 |
SN54221, SN54LS221, SN74221, SN74LS221
DUAL MONOSTABLE MULTIVIBRATORS
WITH SCHMITT TRIGGER INPUTS
SDLS213B DECEMBER 1983 REVISED NOVEMBER 2004
12
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
PARAMETER MEASUREMENT INFORMATION
tPHL
tPLH
tPHL
3 V
0 V
th
tsu
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
Timing
Input
Data
Input
High-Level
Pulse
Low-Level
Pulse
tw
VOLTAGE WAVEFORMS
PULSE DURATIONS
Input
Out-of-Phase
Output
3 V
0 V
VOL
VOH
VOL
In-Phase
Output
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
LOAD CIRCUIT FOR
BI-STATE
TOTEM-POLE OUTPUTS
(see Note B)
VCC
RL
From Output
Under Test
CL = 15 pF
(see Note A)
Test
Point
NOTES: A. CL includes probe and jig capacitance.
B. All diodes are 1N3064 or equivalent.
C. In the examples above, the phase relationships between inputs and outputs have been chosen arbitrarily.
D. All input pulses are supplied by generators having the following characteristics: PRR
≤ 1 MHz, ZO ≈ 50 and, for SN54/74221,
tr ≤ 7 ns, tf ≤ 7 ns, for SN54/74LS221, tr ≤ 15 ns, tf ≤ 6 ns.
E. All measurements are made between the 1.5-V points of the indicated transitions for the SN54/74221 or between the 1.3-V points
for the SN54/74LS221.
Figure 2. Load Circuits and Voltage Waveforms
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