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參數(shù)資料
| 型號： | ISPPAC-CLK5620V-01T100C |
| 廠商： | LATTICE SEMICONDUCTOR CORP |
| 元件分類： | 時鐘及定時 |
| 英文描述： | LED Area Light; LED Color:Blue; Leaded Process Compatible:No; Light Emitting Area:80x80mm; Peak Reflow Compatible (260 C):No; Supply Current:250mA; Supply Voltage:24VDC; Wavelength:470nm |
| 中文描述： | 5600 SERIES, PLL BASED CLOCK DRIVER, 20 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP100 |
| 封裝： | TQFP-100 |
| 文件頁數(shù)： | 18/47頁 |
| 文件大?。?/td> | 871K |
| 代理商： | ISPPAC-CLK5620V-01T100C |
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Lattice Semiconductor
ispClock5600 Family Data Sheet
18
Table 3. Nominal Output Duty Cycle vs. V-Divider Setting
PLL_BYPASS Mode
The PLL_BYPASS mode is provided so that input reference signals can be coupled through to the outputs without
using the PLL functions. When PLL_BYPASS mode is enabled (PLL_BYPASS=HIGH), the output of the M divider
is routed directly to the inputs of the V dividers. In PLL_BYPASS mode, the nominal values of the V dividers are
halved, so that they provide division ratios ranging from 1 to 32. The output frequency for a given V divider (f
k
) will
be determined by
(2)
Please note that PLL_BYPASS mode is provided primarily for testing purposes. When PLL_BYPASS mode is
enabled, features such as lock detect and skew generation are unavailable.
Reference and External Feedback Inputs
The ispClock5600 provide sets of con
fi
gurable, internally-terminated inputs for both clock reference and feedback
signals. In normal operation, the one of the clock reference input pairs (REFA+/- or REFB+/-) is used as a clock
input.
The external feedback inputs make it possible to sample an output signal at the point of delivery. This makes it pos-
sible to provide output clocks which have very low skews in relation to the reference clock regardless of loading
effects.
The ispClock5610 provides one input signal pair for reference input and one input pair for external feedback, while
the ispClock5620 provides two pairs for reference signals and two pairs for feedback. To select between reference
and feedback inputs, the ispClock5620 provides two CMOS-compatible digital inputs called REFSEL and FBKSEL.
Table 4 shows the behavior of these two control inputs.
Divider Settings
with 50% Output
Duty Cycle
Divider Settings with
Non-50% Output Duty
Cycles
V
DC%
V
DC%
2
50
6
33
4
10
40
8
14
43
12
18
44
16
22
45
20
26
46
24
30
47
28
34
47
32
38
47
36
42
48
40
46
48
44
50
48
48
54
48
52
58
48
56
62
48
60
64
=
f
k
f
ref
x 2
M x V
k
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ISPPAC-CLK5620V-01T100I | In-System Programmable, Zero-Delay Clock Generator with Universal Fan-Out Buffer |
| ISPPAC-CLK5610V-01T48C | Spot Light; LED Color:Blue; Leaded Process Compatible:No; Peak Reflow Compatible (260 C):No; Supply Current:160mA; Supply Voltage:30VDC; Wavelength:470nm |
| ISPPAC-CLK5620V-01T48C | LED Area Light; LED Color:Green; Leaded Process Compatible:No; Light Emitting Area:62x62mm; Peak Reflow Compatible (260 C):No; Supply Current:200mA; Supply Voltage:24VDC; Wavelength:525nm |
| ISPPAC-CLK5610V-01T48I | LED Area Light; LED Color:Green; Leaded Process Compatible:No; Light Emitting Area:80x80mm; Peak Reflow Compatible (260 C):No; Supply Current:250mA; Supply Voltage:24VDC; Wavelength:525nm |
| ISPPAC-CLK5620V-01T48I | Linear Array Light; LED Color:Green; Leaded Process Compatible:No; Peak Reflow Compatible (260 C):No; Supply Current:800mA; Supply Voltage:24VDC; Wavelength:530nm |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ISPPAC-CLK5620V-01T100I | 功能描述:時鐘驅(qū)動器及分配 PROGRAMMABLE ZERO DELAY CL GEN RoHS:否 制造商:Micrel 乘法/除法因子:1:4 輸出類型:Differential 最大輸出頻率:4.2 GHz 電源電壓-最大: 電源電壓-最小:5 V 最大工作溫度:+ 85 C 封裝 / 箱體:SOIC-8 封裝:Reel |
| ISPPAC-CLK5620V-01T48C | 制造商:LATTICE 制造商全稱:Lattice Semiconductor 功能描述:In-System Programmable, Zero-Delay Clock Generator with Universal Fan-Out Buffer |
| ISPPAC-CLK5620V-01T48I | 制造商:LATTICE 制造商全稱:Lattice Semiconductor 功能描述:In-System Programmable, Zero-Delay Clock Generator with Universal Fan-Out Buffer |
| ISPPAC-CLK5620V-01TN100C | 功能描述:時鐘驅(qū)動器及分配 PROGRAMMABLE ZERO DELAY CL GEN RoHS:否 制造商:Micrel 乘法/除法因子:1:4 輸出類型:Differential 最大輸出頻率:4.2 GHz 電源電壓-最大: 電源電壓-最小:5 V 最大工作溫度:+ 85 C 封裝 / 箱體:SOIC-8 封裝:Reel |
| ISPPAC-CLK5620V-01TN100I | 功能描述:時鐘驅(qū)動器及分配 PROGRAMMABLE ZERO DELAY CL GEN RoHS:否 制造商:Micrel 乘法/除法因子:1:4 輸出類型:Differential 最大輸出頻率:4.2 GHz 電源電壓-最大: 電源電壓-最小:5 V 最大工作溫度:+ 85 C 封裝 / 箱體:SOIC-8 封裝:Reel |
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