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參數(shù)資料
| 型號： | ISPLSI5512VA-100LB388 |
| 廠商： | LATTICE SEMICONDUCTOR CORP |
| 元件分類： | PLD |
| 英文描述： | In-System Programmable 3.3V SuperWIDE⑩ High Density PLD |
| 中文描述： | EE PLD, 13 ns, PBGA388 |
| 封裝： | BGA-388 |
| 文件頁數(shù)： | 16/26頁 |
| 文件大?。?/td> | 331K |
| 代理商： | ISPLSI5512VA-100LB388 |
Specifications
ispLSI 5512VA
16
Power Consumption
setting operates product terms at their normal full power
consumption. For portions of the logic that can tolerate
longer propagation delays, selecting the slower
“
low-
power
”
setting will significantly reduce the power
dissipation for these product terms. Figure 10 shows the
relationship between power and operating speed.
Power consumption in the ispLSI 5512VA device de-
pends on two primary factors: the speed at which the
device is operating and the number of product terms
used. The product terms have a fuse-selectable speed/
power tradeoff setting. Each group of four product terms
has a single speed/power tradeoff control fuse that acts
on the complete group of four. The fast
“
high-speed
”
2000
20
40
60
80
100
120
f
max (MHz)
I
C
Notes: Configuration of 32 16-bit Counters
Typical Current at 3.3V, 25
°
C
ispLSI 5512VA
High Speed Mode
ispLSI 5512VA
Low Power Mode
0127/5512va
ICC can be estimated for the ispLSI 5512VA using the following equation:
High Speed Mode:
ICC = 70 + (# of PTs * 0.4592) + (# of nets * Max. freq * 0.00391)
Low Power Mode:
ICC = 70 + (# of PTs * 0.160) + (# of nets * Max. freq * 0.00391)
# of PTs = Number of Product Terms used in design
# of nets = Number of Signals used in device
Max. freq = Highest Clock Frequency to the device
The ICC estimate is based on typical conditions (VCC = 3.3V, room temperature) and an assumption of 2 GLB loads
on average exists. These values are for estimates only. Since the value of ICC is sensitive to operating conditions
and the program in the device, the actual ICC should be verified.
300
400
500
550
450
350
250
600
700
750
650
800
Figure 10. Typical Device Power Consumption vs fmax
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ispLSI5512VA-125LB272 | In-System Programmable 3.3V SuperWIDE⑩ High Density PLD |
| ispLSI5512VA-125LB388 | In-System Programmable 3.3V SuperWIDE⑩ High Density PLD |
| ispLSI5512VA-125LQ208 | In-System Programmable 3.3V SuperWIDE⑩ High Density PLD |
| ISPLSI5512VA-70LB272 | In-System Programmable 3.3V SuperWIDE⑩ High Density PLD |
| ISPLSI5512VA-70LB388 | In-System Programmable 3.3V SuperWIDE⑩ High Density PLD |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ISPLSI5512VA-100LQ208 | 功能描述:CPLD - 復(fù)雜可編程邏輯器件 RoHS:否 制造商:Lattice 系列: 存儲類型:EEPROM 大電池數(shù)量:128 最大工作頻率:333 MHz 延遲時間:2.7 ns 可編程輸入/輸出端數(shù)量:64 工作電源電壓:3.3 V 最大工作溫度:+ 90 C 最小工作溫度:0 C 封裝 / 箱體:TQFP-100 |
| ISPLSI5512VA-110LB272 | 功能描述:CPLD - 復(fù)雜可編程邏輯器件 RoHS:否 制造商:Lattice 系列: 存儲類型:EEPROM 大電池數(shù)量:128 最大工作頻率:333 MHz 延遲時間:2.7 ns 可編程輸入/輸出端數(shù)量:64 工作電源電壓:3.3 V 最大工作溫度:+ 90 C 最小工作溫度:0 C 封裝 / 箱體:TQFP-100 |
| ISPLSI5512VA-110LB388 | 功能描述:CPLD - 復(fù)雜可編程邏輯器件 RoHS:否 制造商:Lattice 系列: 存儲類型:EEPROM 大電池數(shù)量:128 最大工作頻率:333 MHz 延遲時間:2.7 ns 可編程輸入/輸出端數(shù)量:64 工作電源電壓:3.3 V 最大工作溫度:+ 90 C 最小工作溫度:0 C 封裝 / 箱體:TQFP-100 |
| ISPLSI5512VA-110LQ208 | 功能描述:CPLD - 復(fù)雜可編程邏輯器件 RoHS:否 制造商:Lattice 系列: 存儲類型:EEPROM 大電池數(shù)量:128 最大工作頻率:333 MHz 延遲時間:2.7 ns 可編程輸入/輸出端數(shù)量:64 工作電源電壓:3.3 V 最大工作溫度:+ 90 C 最小工作溫度:0 C 封裝 / 箱體:TQFP-100 |
| ISPLSI5512VA-70LB272 | 功能描述:CPLD - 復(fù)雜可編程邏輯器件 RoHS:否 制造商:Lattice 系列: 存儲類型:EEPROM 大電池數(shù)量:128 最大工作頻率:333 MHz 延遲時間:2.7 ns 可編程輸入/輸出端數(shù)量:64 工作電源電壓:3.3 V 最大工作溫度:+ 90 C 最小工作溫度:0 C 封裝 / 箱體:TQFP-100 |
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