參數(shù)資料
型號(hào): ISPLSI2192VL-135LT128
廠商: Lattice Semiconductor Corporation
英文描述: 3.3V In-System Programmable SuperFAST⑩ High Density PLD
中文描述: 3.3在系統(tǒng)可編程超快⑩高密度可編程邏輯器件
文件頁數(shù): 9/13頁
文件大小: 163K
代理商: ISPLSI2192VL-135LT128
Specifications
ispLSI 2192VL
9
RESET
GOE 0, GOE 1
Y0, Y1, Y2
BSCAN
TDI/IN 0
TMS/IN 1
TDO/IN 6
TCK/IN 7
IN 2-5, IN 8-11
15
80, 17
14, 83, 78
19
20
112
48
77
, 49, 82,
, 84, 113, 13,
G4
F12, G2
F3, F10, G11
F1
G3
J6
C7
G12
M7, J7, F9, G10, E12, B6,
F2, E1
A1, A12, D4, D9, E5, E8, F6,
F7, G6, G7, H5, H8, J4, J9,
M1, M12
B1, B12, E6, E7, F5, F8, G5,
G8, H6, H7, L1, L12
K2
GND
18, 34, 50, 63, 79, 98, 111,
127
VCC
2, 16, 31, 47, 66, 81, 95, 114
NC
1
1. NC pins are not to be connected to any active signals, VCC or GND.
Signal Locations
Signal Name 128-Pin TQFP 144-Ball fpBGA
Signal Descriptions
RESET
GOE 0, GOE1
Y0, Y1, Y2
Active Low (0) Reset pin resets all the registers in the device.
Global Output Enable input pins.
Dedicated Clock Input
These clock inputs are connected to one of the clock inputs of all the GLBs in
the device.
Input
Dedicated in-system programming Boundary Scan enable input pin. This pin is brought low to
enable the programming mode. The TMS, TDI, TDO and TCK controls become active.
Input
This pin performs two functions. When
BSCAN
is logic low, it functions as a serial data input pin
to load programming data into the device. When
BSCAN
is high, it functions as a dedicated input pin.
Input
This pin performs two functions. When
BSCAN
is logic low, it functions as a clock pin for the
Boundary Scan state machine. When
BSCAN
is high, it functions as a dedicated input pin.
Input
This pin performs two functions. When
BSCAN
is logic low, it functions as a mode control pin for
the Boundary Scan state machine. When
BSCAN
is high, it functions as a dedicated input pin.
Output/Input
This pin performs two functions. When
BSCAN
is logic low, it functions as an output pin
to read serial shift register data. When
BSCAN
is high, it functions as a dedicated input pin.
Dedicated Input Pins to the device.
Ground (GND)
Vcc
No Connect
Input/Output Pins
These are the general purpose I/O pins used by the logic array.
BSCAN
TDI/IN 0
TCK/IN 7
TMS/IN 1
TDO/IN 6
IN 2-5, IN 8-11
GND
VCC
NC
1
I/O
Signal Name Description
1. NC pins are not to be connected to any active signals, VCC or GND.
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