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參數(shù)資料
| 型號(hào)： | ISPLSI2128VE-135LQ160 |
| 廠商： | LATTICE SEMICONDUCTOR CORP |
| 元件分類： | PLD |
| 英文描述： | 3.3V In-System Programmable SuperFAST⑩ High Density PLD |
| 中文描述： | EE PLD, 10 ns, PQFP160 |
| 封裝： | PLASTIC, QFP-160 |
| 文件頁數(shù)： | 11/19頁 |
| 文件大?。?/td> | 234K |
| 代理商： | ISPLSI2128VE-135LQ160 |
Specifications
ispLSI 2128VE
11
Signal Descriptions
RESET
GOE 0, GOE1
Y0, Y1, Y2
Active Low (0) Reset pin resets all the registers in the device.
Global Output Enable input pins.
Dedicated Clock Input
–
These clock inputs are connected to one of the clock inputs of all the GLBs in
the device.
Input
–
Dedicated in-system programming Boundary Scan enable input pin. This pin is brought low to
enable the programming mode. The TMS, TDI, TDO and TCK controls become active.
Input
–
This pin performs two functions. When
BSCAN
is logic low, it functions as a serial data input pin
to load programming data into the device. When
BSCAN
is high, it functions as a dedicated input pin.
Input
–
This pin performs two functions. When
BSCAN
is logic low, it functions as a clock pin for the
Boundary Scan state machine. When
BSCAN
is high, it functions as a dedicated input pin.
Input
–
This pin performs two functions. When
BSCAN
is logic low, it functions as a mode control pin for
the Boundary Scan state machine. When
BSCAN
is high, it functions as a dedicated input pin.
Output/Input
–
This pin performs two functions. When
BSCAN
is logic low, it functions as an output pin
to read serial shift register data. When
BSCAN
is high, it functions as a dedicated input pin.
Dedicated Input Pins to the device.
Ground (GND)
Vcc
No Connect
Input/Output Pins
–
These are the general purpose I/O pins used by the logic array.
BSCAN
TDI/IN 0
TCK/IN 3
TMS/IN 1
TDO/IN 2
IN 4 - IN 7
GND
VCC
NC
1
I/O
Signal Name Description
1. NC pins are not to be connected to any active signals, VCC or GND.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ISPLSI2128-100LQI | In-System Programable High Density PLD |
| ISPLSI2128-80LQI | In-System Programable High Density PLD |
| ISPLSI2128VE | 3.3V In-System Programmable SuperFAST⑩ High Density PLD |
| ISPLSI2128-100LMI | In-System Programable High Density PLD |
| ISPLSI2128-100LQ | In-System Programable High Density PLD |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ISPLSI2128VE135LQ160I | 制造商:LATTICE 制造商全稱:Lattice Semiconductor 功能描述:3.3V In-System Programmable SuperFAST⑩ High Density PLD |
| ISPLSI2128VE-135LT | 制造商:Lattice Semiconductor Corporation 功能描述:EE PLD, 10 ns, PQFP176 |
| ISPLSI2128VE135LT100 | 制造商:LATTICE 制造商全稱:Lattice Semiconductor 功能描述:3.3V In-System Programmable SuperFAST⑩ High Density PLD |
| ISPLSI2128VE-135LT100 | 功能描述:CPLD - 復(fù)雜可編程邏輯器件 RoHS:否 制造商:Lattice 系列: 存儲(chǔ)類型:EEPROM 大電池?cái)?shù)量:128 最大工作頻率:333 MHz 延遲時(shí)間:2.7 ns 可編程輸入/輸出端數(shù)量:64 工作電源電壓:3.3 V 最大工作溫度:+ 90 C 最小工作溫度:0 C 封裝 / 箱體:TQFP-100 |
| ISPLSI2128VE135LT100I | 制造商:LATTICE 制造商全稱:Lattice Semiconductor 功能描述:3.3V In-System Programmable SuperFAST⑩ High Density PLD |
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