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參數(shù)資料
| 型號： | ISPLSI2096E-180LQ128 |
| 廠商： | LATTICE SEMICONDUCTOR CORP |
| 元件分類： | PLD |
| 英文描述： | In-System Programmable SuperFAST⑩ High Density PLD |
| 中文描述： | EE PLD, 5 ns, PQFP128 |
| 封裝： | PLASTIC, QFP-128 |
| 文件頁數(shù)： | 4/11頁 |
| 文件大小： | 142K |
| 代理商： | ISPLSI2096E-180LQ128 |
Specifications
ispLSI 2096E
4
Switching Test Conditions
Figure 2. Test Load
+ 5V
R1
R2
CL
*
Device
Output
Test
Point
*
CL includes Test Fixture and Probe Capacitance.
0213A
TEST CONDITION
R1
470
∞
470
R2
390
390
390
CL
35pF
35pF
35pF
A
B
Active High
Active Low
Active High to Z
at
V
OH
C
470
390
5pF
∞
390
5pF
Active Low to Z
at
V
+0.5V
OL
Table 2 - 0004A/2000
Output Load Conditions (see Figure 2)
Input Pulse Levels
Table 2-0003/2128E
Input Rise and Fall Time 10% to 90%
Input Timing Reference Levels
Output Timing Reference Levels
Output Load
GND to 3.0V
1.5 ns
1.5V
1.5V
See Figure 2
3-state levels are measured 0.5V from
steady-state active level.
V
OL
V
OH
I
IL
SYMBOL
1. One output at a time for a maximum duration of one second. V
OUT
= 0.5V was selected to avoid test
problems by tester ground degradation. Characterized but not 100% tested.
2. Meaured using six 16-bit counters.
3. Typical values are at V
CC
= 5V and T
A
= 25
°
C.
4. Unused inputs held at 0.0V.
5. Maximum I
CC
varies widely with specific device configuration and operating frequency. Refer to the
Power Consumption section of this data sheet and the Thermal Management section of the Lattice Semiconductor
Data Book or CD-ROM to estimate maximum I
CC
.
Table 2-0007/2096E
I
IH
PARAMETER
I
IL-PU
I
OS
1
I
CC
3,4
Output Low Voltage
Output High Voltage
Input or I/O Low Leakage Current
Operating Power Supply Current
I
OL
= 8 mA
I
OH
= -4 mA
0V
≤
V
IN
≤
V
IL
(Max.)
(V
CCIO
- 0.2)V
≤
V
IN
≤
V
CCIO
V
IL
= 0.0V, V
IH
= 3.0V
f
TOGGLE
= 1 MHz
CONDITION
MIN.
–
2.4
–
TYP.
3
–
–
–
MAX.
0.4
–
-10
UNITS
V
V
μ
A
–
–
–
–
10
10
μ
A
μ
A
μ
A
mA
mA
Input or I/O High Leakage Current
V
CCIO
≤
V
IN
≤
5.25V
0V
≤
V
IN
≤
2.0V
V
CCIO
= 5.0V or 3.3V, V
OUT
= 0.5V
I/O Active Pull-Up Current
Output Short Circuit Current
-10
–
–
-250
–
–
-240
–
130
DC Electrical Characteristics
Over Recommended Operating Conditions
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| ISPLSI2096E-100LQ128 | In-System Programmable SuperFAST⑩ High Density PLD |
| ISPLSI2096E-100LT128 | In-System Programmable SuperFAST⑩ High Density PLD |
| ISPLSI2096E-180LT128 | In-System Programmable SuperFAST⑩ High Density PLD |
| ISPLSI2096VE-135LT128 | 3.3V In-System Programmable SuperFAST⑩ High Density PLD |
| ISPLSI2096VE-100LT128 | CRYSTAL 24.0 MHZ 20PF SMD |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ISPLSI2096E-180LT128 | 功能描述:CPLD - 復(fù)雜可編程邏輯器件 RoHS:否 制造商:Lattice 系列: 存儲類型:EEPROM 大電池?cái)?shù)量:128 最大工作頻率:333 MHz 延遲時間:2.7 ns 可編程輸入/輸出端數(shù)量:64 工作電源電壓:3.3 V 最大工作溫度:+ 90 C 最小工作溫度:0 C 封裝 / 箱體:TQFP-100 |
| ISPLSI2096V-60LQ128 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Electrically-Erasable Complex PLD |
| ISPLSI2096V-60LT128 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Electrically-Erasable Complex PLD |
| ISPLSI2096V-60LT128I | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Electrically-Erasable Complex PLD |
| ISPLSI2096V-80LQ128 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Electrically-Erasable Complex PLD |
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