參數(shù)資料
型號： ISPLSI1032E-70LJ
廠商： LATTICE SEMICONDUCTOR CORP
元件分類： PLD
英文描述： In-System Programmable High Density PLD
中文描述： EE PLD, 17.5 ns, PQCC84
封裝： PLASTIC, LCC-84
文件頁數(shù)： 4/17頁
文件大小： 301K
代理商： ISPLSI1032E-70LJ
4
Specifications
ispLSI and pLSI 1032E
Output Load Conditions (see Figure 2)
Switching Test Conditions
TEST CONDITION
R1
470
∞
470
R2
390
390
390
CL
35pF
35pF
35pF
A
B
Active High
Active Low
Active High to Z
at
V
OH
C
470
390
5pF
∞
390
5pF
Active Low to Z
at
V
+0.5V
OL
Table 2-0004/1032E
Figure 2. Test Load
+ 5V
R1
R2
CL
*
Device
Output
Test
Point
*
CL includes Test Fixture and Probe Capacitance.
0213a
DC Electrical Characteristics
Over Recommended Operating Conditions
V
OL
V
OH
I
IL
SYMBOL
1. One output at a time for a maximum duration of one second. V = 0.5V was selected to avoid test problems
by tester ground degradation. Characterized but not 100% tested.
2. Measured using eight 16-bit counters.
3. Typical values are at V = 5V and T = 25
°
C.
4. Maximum I varies widely with specific device configuration and operating frequency. Refer to the Power Consumption
section of this data sheet and Thermal Management section of the Lattice Semiconductor Data Book or CD-ROM to
estimate maximum I .
Table 2-0007/1032E
1
I
IH
I
IL-isp
I
IL-PU
I
OS
PARAMETER
2, 4
I
CC
Output Low Voltage
Output High Voltage
Input or I/O Low Leakage Current
Input or I/O High Leakage Current
ispEN Input Low Leakage Current
I/O Active Pull-Up Current
Output Short Circuit Current
Operating Power Supply Current
I = 8 mA
I = -4 mA
0V
≤
V
≤
V (Max.)
IN
3.5V
≤
V
≤
V
0V
≤
V
≤
V
0V
≤
V
≤
V
V = 5V, V = 0.5V
V = 0.5V, V = 3.0V
f = 1 MHz
IN
CC
IN
IL
IN
IL
CONDITION
MIN.
–
2.4
–
TYP.
–
–
–
MAX.
0.4
–
-10
UNITS
V
V
μ
A
3
–
–
–
–
–
–
–
–
–
–
190
190
10
-150
-150
-200
–
–
μ
A
μ
A
μ
A
mA
mA
mA
Commercial
Industrial
Input Pulse Levels
Table 2-0003/1032E
Input Rise and Fall Time
10% to 90%
Input Timing Reference Levels
Ouput Timing Reference Levels
Output Load
GND to 3.0V
-125
Others
1.5V
1.5V
See Figure 2
3-state levels are measured 0.5V from
steady-state active level.
≤
2 ns
≤
3 ns
相關(guān)PDF資料
PDF描述
ISPLSI1032E-70LJ High-Density Programmable Logic
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
ISPLSI1032E70LJI 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Electrically-Erasable Complex PLD
ispLSI1032E-70LJI 功能描述:CPLD - 復(fù)雜可編程邏輯器件 USE ispMACH 4000V RoHS:否 制造商:Lattice 系列: 存儲類型:EEPROM 大電池數(shù)量:128 最大工作頻率:333 MHz 延遲時間:2.7 ns 可編程輸入/輸出端數(shù)量:64 工作電源電壓:3.3 V 最大工作溫度:+ 90 C 最小工作溫度:0 C 封裝 / 箱體:TQFP-100
ISPLSI1032E70LJN 制造商:LATTICE 制造商全稱:Lattice Semiconductor 功能描述:In-System Programmable High Density PLD
ispLSI1032E-70LJN 功能描述:CPLD - 復(fù)雜可編程邏輯器件 USE ispMACH 4000V RoHS:否 制造商:Lattice 系列: 存儲類型:EEPROM 大電池數(shù)量:128 最大工作頻率:333 MHz 延遲時間:2.7 ns 可編程輸入/輸出端數(shù)量:64 工作電源電壓:3.3 V 最大工作溫度:+ 90 C 最小工作溫度:0 C 封裝 / 箱體:TQFP-100
ISPLSI1032E70LJNI 制造商:LATTICE 制造商全稱:Lattice Semiconductor 功能描述:In-System Programmable High Density PLD
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