Specifications ispLSI 2064VE Power Consumption Power consumption in the ispLSI 2064VE device de- pends on two primary factors: the speed at " />
參數(shù)資料
型號: ISPLSI 2064VE-280LTN44
廠商: Lattice Semiconductor Corporation
文件頁數(shù): 2/17頁
文件大?。?/td> 0K
描述: IC PLD ISP 64I/O 3.5NS 44TQFP
標準包裝: 160
系列: ispLSI® 2000VE
可編程類型: 系統(tǒng)內(nèi)可編程
最大延遲時間 tpd(1): 3.5ns
電壓電源 - 內(nèi)部: 3 V ~ 3.6 V
邏輯元件/邏輯塊數(shù)目: 16
宏單元數(shù): 64
門數(shù): 2000
輸入/輸出數(shù): 32
工作溫度: 0°C ~ 70°C
安裝類型: 表面貼裝
封裝/外殼: 44-TQFP
供應商設備封裝: 44-TQFP(10x10)
包裝: 托盤
其它名稱: ISPLSI2064VE-280LTN44
10
Specifications ispLSI 2064VE
Power Consumption
Power consumption in the ispLSI 2064VE device de-
pends on two primary factors: the speed at which the
device is operating and the number of Product Terms
used. Figure 3 shows the relationship between power
and operating speed.
Figure 3. Typical Device Power Consumption vs fmax
0127/2064VE
ICC can be estimated for the ispLSI 2064VE using the following equation:
ICC(mA) = 8 + (# of PTs * 0.67) + (# of Nets * Fmax * 0.0045)
Where:
# of PTs = Number of Product Terms used in design
# of nets = Number of Signals used in device
Max freq = Highest Clock Frequency to the device (in MHz)
The ICC estimate is based on typical conditions (VCC = 3.3V, room temperature) and an assumption of two GLB
loads on average exists. These values are for estimates only. Since the value of ICC is sensitive to operating
conditions and the program in the device, the actual ICC should be verified.
Notes: Configuration of four 16-bit counters
Typical current at 3.3V, 25° C
100
140
050
100
150
200
250
300
fmax (MHz)
ispLSI 2064VE
160
180
120
80
I CC
(mA)
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