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參數(shù)資料
| 型號(hào)： | ISPL1048E-125LQI |
| 廠商： | Lattice Semiconductor Corporation |
| 英文描述： | High-Density Programmable Logic |
| 中文描述： | 高密度可編程邏輯 |
| 文件頁數(shù)： | 9/16頁 |
| 文件大?。?/td> | 158K |
| 代理商： | ISPL1048E-125LQI |
Specifications
ispLSI 1048E
9
U40
NES
1.8
Internal Timing Parameters
1
t
ob
t
sl
1. Internal timing parameters are not tested and are for reference only.
2. Refer to Timing Model in this data sheet for further details.
Table 2-0037A/1048E
Outputs
UNITS
-100
MIN.
-90
MIN.
MAX.
MAX.
DESCRIPTION
#
PARAMETER
49 Output Buffer Delay
50 Output Slew Limited Delay Adder
–
–
–
–
1.7
12.0
ns
ns
t
oen
t
odis
t
goe
51 I/O Cell OE to Output Enabled
52 I/O Cell OE to Output Disabled
53 Global OE
–
–
–
–
–
6.4
6.4
2.6
ns
ns
ns
t
gy0
t
gy1/2
t
gcp
t
ioy2/3
t
iocp
54 Clock Delay, Y0 to Global GLB Clock Line (Ref. clock)
2.0
2.8
2.8
ns
Global Reset
t
gr
2.0
10.0
5.1
5.1
3.9
Clocks
2.0
59 Global Reset to GLB and I/O Registers
–
4.5
ns
4.3
55 Clock Delay, Y1 or Y2 to Global GLB Clock Line
56 Clock Delay, Clock GLB to Global GLB Clock Line
57 Clock Delay, Y2 or Y3 to I/O Cell Global Clock Line
58 Clock Delay, Clock GLB to I/O Cell Global Clock Line
2.0
0.8
0.0
0.8
2.8
0.8
0.0
0.8
2.8
1.8
0.5
ns
ns
ns
ns
2.0
1.8
0.0
1.8
-125
MIN. MAX.
–
–
–
–
–
0.9
1.3
10.0
4.3
4.3
2.7
0.9
–
2.8
0.9
0.8
0.0
0.8
0.9
1.8
0.0
1.8
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ISPL1048E-100LQ | High-Density Programmable Logic |
| ISPL1048E-100LQI | High-Density Programmable Logic |
| ISPL1048E-100LT | High-Density Programmable Logic |
| ISPL1048E-100LTI | High-Density Programmable Logic |
| ISPL1048E-125LQ | High-Density Programmable Logic |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ISPL1048E-125LT | 制造商:LATTICE 制造商全稱:Lattice Semiconductor 功能描述:High-Density Programmable Logic |
| ISPL1048E-125LTI | 制造商:LATTICE 制造商全稱:Lattice Semiconductor 功能描述:High-Density Programmable Logic |
| ISPL1048E-50LQ | 制造商:LATTICE 制造商全稱:Lattice Semiconductor 功能描述:High-Density Programmable Logic |
| ISPL1048E-50LQI | 制造商:LATTICE 制造商全稱:Lattice Semiconductor 功能描述:High-Density Programmable Logic |
| ISPL1048E-50LT | 制造商:LATTICE 制造商全稱:Lattice Semiconductor 功能描述:High-Density Programmable Logic |
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