參數(shù)資料
型號(hào): ISO212KP
元件分類: 隔離放大器
英文描述: Low Cost, Two-Port Isolated, 1500Vrms ISOLATION AMPLIFIER
中文描述: 低成本,雙端口隔離,1500Vrms隔離放大器
文件頁(yè)數(shù): 8/11頁(yè)
文件大?。?/td> 130K
代理商: ISO212KP
ISO212P
8
external driver connected to Clk In. See Figure 5. The driver
may be an external component with Series 4000 CMOS
characteristics, or one of the ISO212Ps in the system can be
used as the master clock for the system. See Figure 6 and 7
for connections in multiple ISO212P installations.
CHARGE ISOLATION
When more than one ISO212P is used in synchronous mode,
the charge which is returned from the timing capacitor
(220pF in Figure 5) on each transition of the clock becomes
significant. Figure 7 illustrates a method of isolating the
“Clk Out” clamp diodes (Figure 5) from this charge.
A 22k
resistor (recommended maximum to use) together
with the 39k
internal oscillator timing resistor (Figure 5)
forms a potential divider. The ratio of these resistors should
be greater than 0.6 which ensures that the input voltage
triggers the inverter connected to “Clk In”. If using a single
resistor, then account must be taken of the paralleled timing
resistors. This means that the 22k
resistor must be halved
to drive two ISO212Ps, or divided by 8 if driving 8 ISO212Ps
to insure that the ratio of greater than 0.6 is maintained. The
series resistors shown in Figure 7
reduce the high frequency
content of the power supply current.
APPLICATIONS
The ISO212P isolation amplifier, together with a few low
cost components, can isolate and accurately convert a 4-to-
20mA input to a
±
10V output with no external adjustment.
Its low height (0.43" (11mm) ) and small footprint (2.5"
x
0.33" (57mm
x
8mm) ) make it the solution of choice in 0.5"
board spacing systems and in all applications where board
area savings are critical.
The ISO212P operates from a single +15V supply and offers
low power consumption and 12-bit accuracy. On the input
side, two isolated power supplies capable of supplying 5mA
at
±
8V are available to power external circuitry.
network, especially when all ISO212Ps are synchronized. It
is best to use a well decoupled distribution point and to take
power to individual ISO212Ps from this point in a star
arrangement as shown in Figure 4.
NOISE
Output noise is generated by residual components of the
25kHz carrier that have not been removed from the signal.
This noise may be reduced by adding an output low pass
filter (see Figure 8). The filter time constants should be set
below the carrier frequency. The output from the ISO212P
is a switched capacitor and requires a high impedance load
to prevent degradation of linearity. Loads of less than 1M
will cause an increase in noise at the carrier frequency and
will appear as ripple in the output waveform. Since the
output signal power is generated from the input side of the
barrier, decoupling of the
±
V
SS 1
outputs will improve the
signal to noise ratio.
SYNCHRONIZATION
OF THE INTERNAL OSCILLATOR
The ISO212P has an internal oscillator and associated tim-
ing components, which can be synchronized, incorporated
into the design. This alleviates the requirement for an exter-
nal high-power clock driver. The typical frequency of oscil-
lation is 50kHz. The internal clock will start when power is
applied to the ISO212P and Clk In is not connected.
Because the frequencies of several ISO212Ps can be margin-
ally different, “beat” frequencies ranging from a few Hz to
a few kHz can exist in multiple amplifier applications. The
design of the ISO212P accommodates “internal synchro-
nous” noise, but a synchronous beat frequency noise will not
be strongly attenuated, especially at very low frequencies if
it is introduced via the power, signal, or potential grounding
paths. To overcome this problem in systems where several
ISO212Ps are used, the design allows synchronization of
each oscillator in a system to one frequency. Do this by
forcing the timing node on the internal oscillator with an
FIGURE 5. Equivalent Circuit, Clock Input/Output. In-
verters are CMOS.
FIGURE 4. Recommended Decoupling and Power Dis-
tribution.
Power In
Track Resistance/Inductance
I
Ground Plane
100μF
10μF
0.1μF
0.1μF
0.1μF
0.1μF
10μF
10μF
I
I
Clamp
Diodes
Clock
In
+V
CC
Com 2
220pF
39k
Clock
Out
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