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參數(shù)資料
| 型號(hào)： | ISL9216 |
| 廠商： | Intersil Corporation |
| 英文描述： | 8 to 12 Cell Li-Ion Battery Overcurrent Protection and Analog Front End Chip Set |
| 中文描述： | 8至12芯鋰離子電池過電流保護(hù)和模擬前端芯片組 |
| 文件頁數(shù)： | 17/33頁 |
| 文件大小： | 645K |
| 代理商： | ISL9216 |
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17
FN6488.1
November 2, 2007
TABLE 5. ANALOG OUT CONTROL REGISTER (ADDR: 03H)
BITS
FUNCTION
DESCRIPTION
7
UFLG1
User Flag 1
General purpose flag usable by microcontroller software. This bit is battery backed up, even when RGO turns off.
6
UFLG0
User Flag 0
General purpose flag usable by microcontroller software. This bit is battery backed up, even when RGO turns off.
5:4
RESERVED
Reserved for future expansion
BIT 3
AO3
BIT 2
AO2
BIT 1
AO1
BIT 0
AO0
OUTPUT VOLTAGE
0
0
0
0
No Output (low power state)
0
0
0
1
VCELL1
0
0
1
0
VCELL2
0
0
1
1
VCELL3
0
1
0
0
VCELL4
0
1
0
1
VCELL5
0
1
1
0
VCELL6
0
1
1
1
VCELL7
1
0
0
0
External Temperature
1
0
0
1
Internal Temperature
1
x
1
x
Reserved
1
1
x
x
Reserved
TABLE 6. FET CONTROL REGISTER (ADDR: 04H)
BIT
FUNCTION
DESCRIPTION
7
SLEEP
Force Sleep
Setting this bit to “1” forces the device to go into a sleep condition. This turns off both FET outputs, the cell balance
outputs and the voltage regulator. This also resets the CFET, DFET, and CB7ON:CB1ON bits. The SLEEP bit is
automatically reset to “0” when the device wakes up. This does not reset the AO3:AO0 bits.
6
LDMONEN
Turn on VMON
connection
(ISL9216 only)
Writing a “1” to this bit turns on the VMON circuit. Writing a “0” to this bit turns off the VMON circuit. As such, the
microcontroller has full control of the operation of this circuit.
5:2
RESERVED
Reserved for future expansion.
1
CFET
(ISL9216 only)
Setting this bit to “1” turns on the charge FET.
Setting this bit to “0” turns off the charge FET.
This bit is automatically reset in the event of a charge overcurrent condition, unless the automatic response is disabled
by the DENOCC bit.
0
DFET
(ISL9216 only)
Setting this bit to “1” turns on the discharge FET.
Setting this bit to “0” turns off the discharge FET.
This bit is automatically reset in the event of a discharge overcurrent or discharge short circuit condition, unless the
automatic response is disabled by the DENOCD or DENSCD bits.
ISL9216, ISL9217
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