參數(shù)資料
型號(hào): ISL8499IRZ-T
廠商: Intersil
文件頁數(shù): 12/14頁
文件大小: 0K
描述: IC SWITCH QUAD SPDT 16QFN
標(biāo)準(zhǔn)包裝: 1
功能: 開關(guān)
電路: 4 x SPDT
導(dǎo)通狀態(tài)電阻: 250 毫歐
電壓電源: 單電源
電壓 - 電源,單路/雙路(±): 1.65 V ~ 4.5 V
電流 - 電源: 90nA
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 16-VFQFN 裸露焊盤
供應(yīng)商設(shè)備封裝: 16-QFN-EP(3x3)
包裝: 剪切帶 (CT)
其它名稱: ISL8499IRZ-TCT
7
FN6111.3
February 5, 2008
Detailed Description
The ISL8499 is a bidirectional, quad single pole/double
throw (SPDT) analog switch that offers precise switching
capability from a single 1.65V to 4.5V supply with low
on-resistance (0.24
Ω) and high speed operation
(tON =15ns, tOFF = 13ns). The device is especially well
suited for portable battery powered equipment due to its low
operating supply voltage (1.65V), low power consumption
(2.7W max), low leakage currents (150nA max), and the tiny
TQFN, QFN and TSSOP packages. The ultra low
ON-Resistance and rON flatness provide very low insertion
loss and distortion to applications that require signal
reproduction.
Supply Sequencing and Overvoltage Protection
With any CMOS device, proper power supply sequencing is
required to protect the device from excessive input currents
which might permanently damage the IC. All I/O pins contain
ESD protection diodes from the pin to V+ and to GND (see
Figure 8). To prevent forward biasing these diodes, V+ must
be applied before any input signals, and the input signal
voltages must remain between V+ and GND. If these
conditions cannot be guaranteed, then one of the following
two protection methods should be employed.
Logic inputs can easily be protected by adding a 1k
Ω
resistor in series with the input (see Figure 8). The resistor
limits the input current below the threshold that produces
permanent damage, and the sub-microamp input current
produces an insignificant voltage drop during normal
operation.
This method is not acceptable for the signal path inputs.
Adding a series resistor to the switch input defeats the
purpose of using a low rON switch, so two small signal
diodes can be added in series with the supply pins to provide
overvoltage protection for all pins (see Figure 8). These
FIGURE 4. OFF ISOLATION TEST CIRCUIT
FIGURE 5.
rON TEST CIRCUIT
FIGURE 6. CROSSTALK TEST CIRCUIT
FIGURE 7. CAPACITANCE TEST CIRCUIT
Test Circuits and Waveforms (Continued)
ANALYZER
RL
SIGNAL
GENERATOR
V+
C
0V or V+
NO or NC
COM
IN
GND
V+
C
0V or V+
NO or NC
COM
IN
GND
VNX
V1
rON = V1/100mA
100mA
0V or V+
ANALYZER
V+
C
NO or NC
SIGNAL
GENERATOR
RL
GND
IN1
COM
50
Ω
N.C.
COM
NC or NO
V+
C
GND
NO or NC
COM
IN
IMPEDANCE
ANALYZER
0V or V+
ISL8499
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