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參數(shù)資料
| 型號： | ISL6740AIVZA |
| 廠商： | INTERSIL CORP |
| 元件分類： | 穩(wěn)壓器 |
| 英文描述： | JT 5C 5#20 PIN PLUG |
| 中文描述： | 1 A SWITCHING CONTROLLER, 2000 kHz SWITCHING FREQ-MAX, PDSO16 |
| 封裝： | LEAD FREE, PLASTIC, MO-153-AC, TSSOP-16 |
| 文件頁數(shù)： | 9/15頁 |
| 文件大小： | 320K |
| 代理商： | ISL6740AIVZA |
9
FN9195.0
February 7, 2005
V
ERROR
-
The inverting input of the PWM comparator. The
error voltage is applied to this pin to control the duty cycle.
Increasing the signal level increases the duty cycle. The
node may be driven with an external error amplifier or opto-
coupler.
The ISL6740A features a built-in soft-start capability. Soft-
start is implemented as a clamp on the error voltage input.
OTS -
The non-inverting input to the over temperature
shutdown comparator. The signal input at this pin is
compared to an internal threshold of V
REF
/2. If the voltage at
this pin exceeds the threshold, the Fault signal is asserted
and the outputs are disabled until the condition clears. There
is a nominal 25
μ
A switched current source used for
hysteresis. The amount of hysteresis is adjustable by
varying the source impedance of the signal into this pin.
OTS may be used to monitor parameters other than
temperature, such as voltage. Any signal for which a high
out-of-bounds monitor is desired may utilize the OTS
comparator.
FAULT -
The Fault signal is asserted high whenever the
outputs, OUTA and OUTB, are disabled. This occurs during
an over temperature fault, an input UV fault, a V
REF
UV
fault, or during an overcurrent or short circuit shutdown fault.
Fault can be used to disable synchronous rectifiers
whenever the outputs are disabled.
Fault is a three-state output and is high impedance during
the soft-start cycle. Adding a pull-up resistor to VREF or a
pull-down resistor to ground determines the state of Fault
during soft-start. This feature allows the designer to use the
Fault signal to enable or disable output synchronous
rectifiers during soft-start.
UV/FF -
Undervoltage monitor and voltage feed forward
input pin. A resistor divider between the input source voltage
and GND sets the undervoltage lock-out threshold and
provides voltage sensing for the feed forward compensation
circuit.
The signal is compared to an internal 1.00V reference to
detect an undervoltage or inhibit condition. For voltages in
excess of the UV threshold, the signal provides voltage
information to the voltage feed forward function.
CS -
This is the input to the current sense comparator. The
overcurrent comparator threshold is set at 0.600V nominal.
The CS pin is shorted to GND at the termination of each
output pulse. Depending on the current sensing source
impedance, a series input resistor may be required due to
the delay between the internal clock and the external power
switch. This delay may allow an overlap such that the CS
signal may be discharged while the current signal is still
active. If the current sense source is low impedance it will
cause increased power dissipation.
Exceeding the overcurrent threshold will start a delayed
shutdown sequence. Once an overcurrent condition is
detected, the soft-start charge current source is disabled.
The soft-start capacitor begins discharging through a 25
μ
A
current source, and if it discharges to less than 4.25V
(Sustained Overcurrent Threshold), a shutdown condition
occurs and the OUTA and OUTB outputs are forced low.
When the soft-start voltage reaches 0.27V (Reset
Threshold) a soft-start cycle begins.
An overcurrent condition must be absent for 50
μ
s before the
delayed shutdown control resets. If the overcurrent condition
ceases, and an additional 50
μ
s period elapses before the
shutdown threshold is reached, no shutdown occurs. The SS
charging current is re-enabled and the soft-start voltage is
allowed to recover.
GND -
Reference and power ground for all functions on this
device. Due to high peak currents and high frequency
operation, a low impedance layout is necessary. Ground
planes and short traces are highly recommended.
OUTA and OUTB -
Alternate half cycle output stages. Each
output is capable of 0.5A peak currents for driving logic level
power MOSFETs or MOSFET drivers. Each output provides
very low impedance to overshoot and undershoot.
VREF -
The 5.00V reference voltage output. +1/-2%
tolerance over line, load and operating temperature. Bypass
to GND with a 0.047
μ
F to 2.2
μ
F ceramic capacitor.
Capacitors outside of this range may cause oscillation.
SS -
Connect the soft-start timing capacitor between this pin
and GND to control the duration of soft-start. The value of
the capacitor determines the rate of increase of the duty
cycle during start up, controls the overcurrent shutdown
delay, and the overcurrent and short circuit hiccup restart
period.
SCSET -
Sets the duty cycle threshold that corresponds to a
short circuit condition. A resistive divider between R
TC
and
GND, V
REF
to GND, R
TD
and GND, or a voltage between 0
and 2V may be used to adjust the SCSET threshold. If using
a resistor divider from either RTC or RTD, the impedance to
GND affects the oscillator timing and should be considered
when determining the oscillator timing components.
Connecting SCSET to GND disables short circuit shutdown
and hiccup.
Functional Description
Features
The ISL6740A PWM is an excellent choice for low cost feed
forward voltage mode bridge topologies for applications
requiring accurate duty cycle and deadtime control. With its
many protection and control features, a highly flexible design
with minimal external components is possible. Among its
many features are voltage feed forward compensation,
adjustable soft-start, overcurrent protection, thermal
ISL6740A
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