參數(shù)資料
型號: ISL6569CB-T
廠商: INTERSIL CORP
元件分類: 穩(wěn)壓器
英文描述: Multi-Phase PWM Controller
中文描述: SWITCHING CONTROLLER, 1000 kHz SWITCHING FREQ-MAX, PDSO24
封裝: PLASTIC, MS-013-AD, SOIC-24
文件頁數(shù): 11/22頁
文件大?。?/td> 497K
代理商: ISL6569CB-T
11
FN9085.7
December 29, 2004
Most multi-phase controllers simply have the output voltage
fed back to the inverting input of the error amplifier through a
resistor. The ISL6569 features an internal differential
remote-sense amplifier in the feedback path. The amplifier
removes the voltage error encountered when measuring the
output voltage relative to the local controller ground
reference point, resulting in a more accurate means of
sensing output voltage. Connect the microprocessor sense
pins to the non-inverting input, VSEN, and inverting input,
RGND, of the remote-sense amplifier. The remote-sense
amplifier output, V
DIFF
, is then tied through an external
resistor to the inverting input of the error amplifier.
A digital to analog converter (DAC) generates a reference
voltage based on the state of logic signals at pins VID4
through VID0. The DAC decodes the a 5-bit logic signal
(VID) into one of the discrete voltages shown in Table 1.
Each VID input offers a 20
μ
A pull-up to an internal 2.5V
source for use with open-drain outputs. External pull-up
resistors or active-high output stages can augment the pull-
up current sources, but a slight accuracy error can occur if
they are pulled above 2.9V. The DAC-selected reference
voltage is connected to the non-inverting input of the error
amplifier.
The ISL6569 features a second non-inverting input to the
error amplifier which allows the user to directly offset the
DAC reference voltage in the positive direction only. The
offset voltage is created by an internal current source which
feeds out the OFS pin into a user selected external resistor
to ground. The resulting voltage across the resistor, V
OFS
, is
internally divided down by ten to create the offset voltage.
This method of offsetting the DAC voltage is more accurate
than external methods of level-shifting the FB pin.
The integrating compensation network shown in Figure 6
assures that the steady-state error in the output voltage is lim-
ited to the error in the reference voltage (output of the DAC)
plus offset errors in the OFS current source, remote-sense
and error amplifiers. Intersil specifies the guaranteed toler-
FIGURE 6. OUTPUT-VOLTAGE AND LOAD-LINE
REGULATION
-
+
I
AVG
REFERENCE
VOLTAGE
EXTERNAL CIRCUIT
ISL6569 INTERNAL CIRCUIT
COMP
C
C
R
C
R
FB
FB
IOUT
VDIFF
VSEN
RGND
-
+
V
DROOP
ERROR AMPLIFIER
-
+
V
OUT
SENSE
POINTS
GND
DIFFERENTIAL
REMOTE-SENSE
AMPLIFIER
V
COMP
+
OFS
x0.1
100
μ
A
R
OFS
OFFSET
VOLTAGE
-
+
V
OFS
REMOTE
TABLE 1. VOLTAGE IDENTIFICATION CODES
VID4
VID3
VID2
VID1
VID0
DAC
0
0
0
0
0
1.550
0
0
0
0
1
1.525
0
0
0
1
0
1.500
0
0
0
1
1
1.475
0
0
1
0
0
1.450
0
0
1
0
1
1.425
0
0
1
1
0
1.400
0
0
1
1
1
1.375
0
1
0
0
0
1.350
0
1
0
0
1
1.325
0
1
0
1
0
1.300
0
1
0
1
1
1.275
0
1
1
0
0
1.250
0
1
1
0
1
1.225
0
1
1
1
0
1.200
0
1
1
1
1
1.175
1
0
0
0
0
1.150
1
0
0
0
1
1.125
1
0
0
1
0
1.100
1
0
0
1
1
1.075
1
0
1
0
0
1.050
1
0
1
0
1
1.025
1
0
1
1
0
1.000
1
0
1
1
1
0.975
1
1
0
0
0
0.950
1
1
0
0
1
0.925
1
1
0
1
0
0.900
1
1
0
1
1
0.875
1
1
1
0
0
0.850
1
1
1
0
1
0.825
1
1
1
1
0
0.800
1
1
1
1
1
Shutdown
ISL6569
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ISL6569CBZ-T 功能描述:IC REG CTRLR DIVIDER PWM 24-SOIC RoHS:是 類別:集成電路 (IC) >> PMIC - 穩(wěn)壓器 - DC DC 切換控制器 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:2,500 系列:- PWM 型:電流模式 輸出數(shù):1 頻率 - 最大:275kHz 占空比:50% 電源電壓:18 V ~ 110 V 降壓:無 升壓:無 回掃:無 反相:無 倍增器:無 除法器:無 Cuk:無 隔離:是 工作溫度:-40°C ~ 85°C 封裝/外殼:8-SOIC(0.154",3.90mm 寬) 包裝:帶卷 (TR)
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