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參數(shù)資料
| 型號： | ISL6568CRZ-T |
| 廠商： | INTERSIL CORP |
| 元件分類： | 穩(wěn)壓器 |
| 英文描述： | Two-Phase Buck PWM Controller with Integrated MOSFET Drivers for VRM9, VRM10, and AMD Hammer Applications |
| 中文描述： | SWITCHING CONTROLLER, 1500 kHz SWITCHING FREQ-MAX, PQCC32 |
| 封裝： | 5 X 5 MM, LEAD FREE, PLASTIC, MO-220-VHHD, MLPL, QFN-32 |
| 文件頁數(shù)： | 20/28頁 |
| 文件大小： | 716K |
| 代理商： | ISL6568CRZ-T |
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20
FN9187.3
July 25, 2005
recovery charge, Q
rr
, and the upper MOSFET r
DS(ON)
conduction loss.
When the upper MOSFET turns off, the lower MOSFET does
not conduct any portion of the inductor current until the
voltage at the phase node falls below ground. Once the
lower MOSFET begins conducting, the current in the upper
MOSFET falls to zero as the current in the lower MOSFET
ramps up to assume the full inductor current. In Equation 17,
the required time for this commutation is t
1
and the
approximated associated power loss is P
UP,1
.
At turn-on, the upper MOSFET begins to conduct and this
transition occurs over a time t
2
. In Equation 18, the
approximate power loss is P
UP,2
.
A third component involves the lower MOSFET reverse-
recovery charge, Q
rr
. Since the inductor current has fully
commutated to the upper MOSFET before the lower-
MOSFET body diode can recover all of Q
rr
, it is conducted
through the upper MOSFET across VIN. The power
dissipated as a result is P
UP,3
.
Finally, the resistive part of the upper MOSFET is given in
Equation 20 as P
UP,4
.
The total power dissipated by the upper MOSFET at full load
can now be approximated as the summation of the results
from Equations 17, 18, 19 and 20. Since the power
equations depend on MOSFET parameters, choosing the
correct MOSFETs can be an iterative process involving
repetitive solutions to the loss equations for different
MOSFETs and different switching frequencies.
Package Power Dissipation
When choosing MOSFETs it is important to consider the
amount of power being dissipated in the integrated drivers
located in the controller. Since there are a total of two drivers
in the controller package, the total power dissipated by both
drivers must be less than the maximum allowable power
dissipation for the QFN package.
Calculating the power dissipation in the drivers for a desired
application is critical to ensure safe operation. Exceeding the
maximum allowable power dissipation level will push the IC
beyond the maximum recommended operating junction
temperature of 125°C. The maximum allowable IC power
dissipation for the 5x5 QFN package is approximately 4W
at
room temperature. See
Layout Considerations
paragraph for
thermal transfer improvement suggestions.
When designing the ISL6568 into an application, it is
recommended that the following calculation is used to
ensure safe operation at the desired frequency for the
selected MOSFETs. The total gate drive power losses,
P
Qg_TOT
, due to the gate charge of MOSFETs and the
integrated driver’s internal circuitry and their corresponding
average driver current can be estimated with Equations 21
and 22, respectively.
In Equations 21 and 22, P
Qg_Q1
is the total upper gate drive
power loss and P
Qg_Q2
is the total lower gate drive power loss;
the gate charge (Q
G1
and Q
G2
) is defined at the particular gate
to source drive voltage PVCC in the corresponding MOSFET
data sheet; I
Q
is the driver total quiescent current with no load
at both drive outputs; N
Q1
and N
Q2
are the number of upper
and lower MOSFETs per phase, respectively; N
PHASE
is the
number of active phases. The I
Q*
VCC product is the quiescent
power of the controller without capacitive load and is typically
75mW at 300kHz.
P
UP 1
V
IN
I
M
N
-----
I
2
--------
+
t
1
2
----
f
S
≈
(EQ. 17)
P
UP 2
,
,
V
IN
N
-----
---2
--------
–
2
----
≈
(EQ. 18)
I
M
I
t
2
f
S
P
UP 3
V
IN
Q
rr
f
S
=
(EQ. 19)
P
UP 4
r
DS ON
)
I
M
N
-----
2
d
I
2
--12
+
≈
(EQ. 20)
FIGURE 15. TYPICAL UPPER-GATE DRIVE TURN-ON PATH
P
Qg_TOT
P
Qg_Q1
P
Qg_Q2
I
Q
VCC
+
+
=
(EQ. 21)
P
Qg_Q1
3
2
--
Q
G1
PVCC
F
SW
N
Q1
N
PHASE
=
P
Qg_Q2
Q
G2
PVCC
F
SW
N
Q2
N
PHASE
=
I
DR
3
2
--
Q
G1
N
Q1
Q
G2
N
Q2
+
N
PHASE
F
SW
I
Q
+
=
(EQ. 22)
Q1
D
S
G
R
GI1
R
G1
BOOT
R
HI1
C
DS
C
GS
C
GD
R
LO1
PHASE
PVCC
UGATE
ISL6568
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| ISL6568CRZ-TKR5184 | 功能描述:IC CTRLR PWM 2PHASE BUCK 32-QFN RoHS:是 類別:集成電路 (IC) >> PMIC - 穩(wěn)壓器 - 專用型 系列:- 標(biāo)準(zhǔn)包裝:43 系列:- 應(yīng)用:控制器，Intel VR11 輸入電壓:5 V ~ 12 V 輸出數(shù):1 輸出電壓:0.5 V ~ 1.6 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:48-VFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:48-QFN（7x7） 包裝:管件 |
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