參數(shù)資料
    型號(hào): ISL6522BCBZ
    廠商: INTERSIL CORP
    元件分類: 穩(wěn)壓器
    英文描述: Buck and Synchronous Rectifier Pulse-Width Modulator (PWM) Controller
    中文描述: SWITCHING CONTROLLER, 230 kHz SWITCHING FREQ-MAX, PDSO14
    封裝: GREEN, PLASTIC, MS-012AB, SOIC-14
    文件頁數(shù): 10/15頁
    文件大?。?/td> 454K
    代理商: ISL6522BCBZ
    10
    3. Place 2
    ND
    Zero at Filter’s Double Pole
    4. Place 1
    ST
    Pole at the ESR Zero
    5. Place 2
    ND
    Pole at Half the Switching Frequency
    6. Check Gain against Error Amplifier’s Open-Loop Gain
    7. Estimate Phase Margin - Repeat if Necessary
    Figure 8 shows an asymptotic plot of the DC-DC converter’s
    gain vs. frequency. The actual modulator gain has a high
    gain peak due to the high Q factor of the output filter and is
    not shown in Figure 8. Using the above guidelines should
    give a compensation gain similar to the curve plotted. The
    open loop error amplifier gain bounds the compensation
    gain. Check the compensation gain at F
    P2
    with the
    capabilities of the error amplifier. The closed loop gain is
    constructed on the log-log graph of Figure 8 by adding the
    modulator gain (in dB) to the compensation gain (in dB). This
    is equivalent to multiplying the modulator transfer function to
    the compensation transfer function and plotting the gain.
    The compensation gain uses external impedance networks
    Z
    FB
    and Z
    IN
    to provide a stable, high bandwidth (BW) overall
    loop. A stable control loop has a gain crossing with
    -20dB/decade slope and a phase margin greater than 45
    degrees. Include worst case component variations when
    determining phase margin.
    Component Selection Guidelines
    Output Capacitor Selection
    An output capacitor is required to filter the output and supply
    the load transient current. The filtering requirements are a
    function of the switching frequency and the ripple current.
    The load transient requirements are a function of the slew
    rate (di/dt) and the magnitude of the transient load current.
    These requirements are generally met with a mix of
    capacitors and careful layout.
    Modern microprocessors produce transient load rates above
    1A/ns. High frequency capacitors initially supply the transient
    and slow the current load rate seen by the bulk capacitors.
    The bulk filter capacitor values are generally determined by
    the ESR (effective series resistance) and voltage rating
    requirements rather than actual capacitance requirements.
    High frequency decoupling capacitors should be placed as
    close to the power pins of the load as physically possible. Be
    careful not to add inductance in the circuit board wiring that
    could cancel the usefulness of these low inductance
    components. Consult with the manufacturer of the load on
    specific decoupling requirements. For example, Intel
    recommends that the high frequency decoupling for the
    Pentium-Pro be composed of at least forty (40) 1.0
    μ
    F
    ceramic capacitors in the 1206 surface-mount package.
    Use only specialized low-ESR capacitors intended for
    switching-regulator applications for the bulk capacitors. The
    bulk capacitor’s ESR will determine the output ripple voltage
    and the initial voltage drop after a high slew-rate transient.
    An aluminum electrolytic capacitor’s ESR value is related to
    the case size with lower ESR available in larger case sizes.
    However, the equivalent series inductance (ESL) of these
    capacitors increases with case size and can reduce the
    usefulness of the capacitor to high slew-rate transient
    loading. Unfortunately, ESL is not a specified parameter. Work
    with your capacitor supplier and measure the capacitor’s
    impedance with frequency to select a suitable component. In
    most cases, multiple electrolytic capacitors of small case size
    perform better than a single large case capacitor.
    Output Inductor Selection
    The output inductor is selected to meet the output voltage
    ripple requirements and minimize the converter’s response
    time to the load transient. The inductor value determines the
    converter’s ripple current and the ripple voltage is a function
    of the ripple current. The ripple voltage and current are
    approximated by the following equations:
    Increasing the value of inductance reduces the ripple current
    and voltage. However, the large inductance values reduce
    the converter’s response time to a load transient.
    One of the parameters limiting the converter’s response to a
    load transient is the time required to change the inductor
    current. Given a sufficiently fast control loop design, the
    ISL6522B will provide either 0% or 100% duty cycle in
    response to a load transient. The response time is the time
    required to slew the inductor current from an initial current
    value to the transient current level. During this interval the
    difference between the inductor current and the transient
    current level must be supplied by the output capacitor.
    Minimizing the response time can minimize the output
    capacitance required.
    100
    80
    60
    40
    20
    0
    -20
    -40
    -60
    F
    P1
    F
    Z2
    10M
    1M
    100K
    10K
    1K
    100
    10
    OPEN LOOP
    ERROR AMP GAIN
    F
    Z1
    F
    P2
    F
    LC
    F
    ESR
    COMPENSATION
    GAIN
    G
    FREQUENCY (Hz)
    20LOG
    (V
    IN
    /
    V
    OSC
    )
    MODULATOR
    GAIN
    20LOG
    (R2/R1)
    CLOSED LOOP
    GAIN
    FIGURE 8. ASYMPTOTIC BODE PLOT OF CONVERTER GAIN
    I =
    V
    - V
    Fs x L
    -------------------------------
    V
    V
    IN
    ---------------
    V
    OUT
    =
    I x ESR
    ISL6522B
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