參數(shù)資料
型號: ISL6521EVAL1
廠商: Intersil Corporation
元件分類: 基準電壓源/電流源
英文描述: PWM Buck DC-DC and Triple Linear Power Controller
中文描述: PWM型降壓DC - DC及三線性功率控制器
文件頁數(shù): 7/13頁
文件大小: 639K
代理商: ISL6521EVAL1
7
The OC trip point varies with MOSFET’s r
DS(ON)
temperature variations. To avoid overcurrent tripping in the
normal operating load range, determine the R
OCSET
resistor from the equation above with:
1. The maximum r
DS(ON)
at the highest junction temperature.
2. The minimum I
OCSET
from the specification table.
3. Determine I
PEAK
for I
PEAK
> I
OUT(MAX)
+ (
I) 2, where
I is the output inductor ripple current.
For an equation for the ripple current see the section under
component guidelines titled ‘Output Inductor Selection’.
Output Voltage Selection
The output voltage of the PWM converter can be resistor-
programmed to any level between V
IN
and 0.8V However,
since the value of R
S1
is affecting the values of the rest of
the compensation components, it is advisable its value is
kept between 2k
and 5k
.
Output voltage selection on the linear regulators is set by
means of external resistor dividers as shown in Figure 4.
The two resistors used to set the voltage on each of the
three linear regulators have to meet the following criteria:
their value while in a parallel connection has to be less than
5k
, or otherwise said, the following relationship has to be
met:
To ensure the parallel combination of the feedback resistors
equals a certain chosen value, R
FB
, use the following
equations:
, where
V
OUT
- the desired output voltage,
V
FB
- feedback (reference) voltage, 0.8V.
Application Guidelines
Soft-Start Interval
The soft-start function controls the output voltages rate of rise
to limit the current surge at start-up. The soft-start function is
integrated on the chip and the soft-start interval is fixed.
PWM Controller Feedback Compensation
The PWM controller uses voltage-mode control for output
regulation. This section highlights the design consideration
for a PWM voltage-mode controller. Apply the methods and
considerations only to the PWM controller.
Figure 5 highlights the voltage-mode control loop for a
synchronous-rectified buck converter. The output voltage
(V
OUT
) is regulated to the reference voltage level, 0.8V. The
error amplifier (Error Amp) output (V
E/A
) is compared with
the oscillator (OSC) triangular wave to provide a pulse-width
modulated (PWM) wave with an amplitude of V
IN
at the
PHASE node. The PWM wave is smoothed by the output
filter (L
O
and C
O
).
The modulator transfer function is the small-signal transfer
function of V
OUT
/V
E/A
This function is dominated by a DC
Gain, given by V
IN
/V
OSC
and shaped by the output filter,
with a double pole break frequency at F
LC
and a zero at
F
ESR
Modulator Break Frequency Equations
The compensation network consists of the error amplifier
(internal to the ISL6521) and the impedance networks Z
IN
UGATE
OCSET
PHASE
OCC
+
-
GATE
CONTROL
VCC
OC
40
μ
A
V
DS(ON)
i
D
V
SET
R
OCSET
V
IN
= +5V
OVERCURRENT TRIP:
VDS
I
OCSET
+
+
FIGURE 3. OVERCURRENT DETECTION
PWM
DRIVE
iD
rDS ON
(
)
IOCSET
ROCSET
>
VSET
>
VPHASE
VOCSET
VIN
VIN
VDS
VSET
=
=
DRIVE3
FB3
FB4
C
OUT4
C
OUT3
Q3
ISL6521
V
OUT3
V
OUT4
+5V
IN
DRIVE4
R
S3
R
P3
R
S4
R
P4
VOUT
0.8
1
RP
+
×
=
FIGURE 4. ADJUSTING THE OUTPUT VOLTAGE OF ANY OF
THE FOUR REGULATORS (OUTPUTS 3 AND 4
PICTURED)
+
+
R
R
S
P
R
P
+
---------------------
5k
<
R
S
V
FB
---------------
R
FB
×
=
R
P
R
V
OUT
V
FB
--------------------------------
=
F
LC
L
O
2
π
C
O
×
×
---------------------------------------
=
F
ESR
2
π
ESR
C
O
×
×
-----------------------------------------
=
ISL6521
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