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參數資料
| 型號： | ISL6504ACR |
| 廠商： | INTERSIL CORP |
| 元件分類： | 電源管理 |
| 英文描述： | Multiple Linear Power Controller with ACPI Control Interface |
| 中文描述： | 4-CHANNEL POWER SUPPLY SUPPORT CKT, PQCC20 |
| 封裝： | 6 X 6 MM, EXPOSED PAD, PLASTIC, MO-220-VJJB, MLFP-20 |
| 文件頁數： | 8/16頁 |
| 文件大?。?/td> | 409K |
| 代理商： | ISL6504ACR |
8
FN9062.2
April 13, 2004
well as all the control and monitoring functions necessary for
complete ACPI implementation.
Initialization
The ISL6504/A automatically initializes upon receipt of input
power. The Power-On Reset (POR) function continually
monitors the 5V
SB
input supply voltage, initiating
3.3V
DUAL
/3.3V
SB
and 1.5V
SB
soft-start operation shortly
after exceeding POR threshold.
Dual Outputs Operational Truth Table
Table 1 describes the truth combinations pertaining to the
3.3V
DUAL/SB
and 5V
DUAL
outputs. The last two lines
highlight the only difference between the ISL6504 and
ISL6504A. The internal circuitry does not allow the transition
from an S3 (suspend to RAM) state to an S4/S5 (suspend to
disk/soft off) state or vice versa. The only ‘legal’ transitions
are from an active state (S0, S1) to a sleep state (S3, S5)
and vice versa.
Functional Timing Diagrams
Figures 4 (ISL6504), 5 (ISL6504A), and 6 are timing diagrams,
detailing the power up/down sequences of all the outputs in
response to the status of the sleep-state pins (S3, S5), as well
as the status of the input ATX supply. Not shown in these
diagrams is the deglitching feature used to protect against false
sleep state tripping. Both S3 and S5 pins are protected against
noise by a 2
μ
s filter (typically 1–4
μ
s). This feature is useful in
noisy computer environments if the control signals have to
travel over significant distances. Additionally, the S3 pin
features a 200
μ
s delay in transitioning to sleep states. Once the
S3 pin goes low, an internal timer is activated. At the end of
the 200
μ
s interval, if the S5 pin is low, the ISL6504/A
switches into S5 sleep state; if the S5 pin is high, the
ISL6504/A goes into S3 sleep state.
TABLE 1. 5V
DUAL
OUTPUT (V
OUT4
) TRUTH TABLE
S5
S3
3.3VDL/SB
5VDL
COMMENTS
1
1
3.3V
5V
S0/S1/S2 States (Active)
1
0
3.3V
5V
S3
0
1
Note
Maintains Previous State
0
0
3.3V
0V
S4/S5 (ISL6504)
0
0
3.3V
5V
S4/S5 (ISL6504A)
NOTE: Combination Not Allowed.
FIGURE 4. 5V
DUAL
AND 3.3V
DUAL
/3.3V
SB
TIMING
DIAGRAM; ISL6504
5VSB
3.3V, 5V
S3
S5
5VDLSB
DLA
3V3DLSB
3V3DL
5VDL
FIGURE 5. 5V
DUAL
AND 3.3V
DUAL
/3.3V
SB
TIMING
DIAGRAM; ISL6504A
5VSB
3.3V, 5V
S3
S5
5VDLSB
DLA
3V3DLSB
3V3DL
5VDL
FIGURE 6. 1.5V
SB
, AND 1.2V
VID
TIMING DIAGRAM
5VSB
3.3V,
S3
S5
1V2VID
DLA
1V5SB
5V, 12V
ISL6504, ISL6504A
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| ISL6504ACRZ-T | 功能描述:DC/DC 開關控制器 20LD MLFP 4 OUTPUT ACPI PWR CONTR BR RoHS:否 制造商:Texas Instruments 輸入電壓:6 V to 100 V 開關頻率: 輸出電壓:1.215 V to 80 V 輸出電流:3.5 A 輸出端數量:1 最大工作溫度:+ 125 C 安裝風格: 封裝 / 箱體:CPAK |
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