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參數(shù)資料
| 型號(hào)： | ISL6455A |
| 廠商： | Intersil Corporation |
| 英文描述： | Triple Output Regulator with Single Synchronous Buck and Dual LDO(帶單同步降壓和雙LDO的三路輸出調(diào)節(jié)器) |
| 中文描述： | 三單和雙同步降壓穩(wěn)壓器LDO輸出（帶單同步降壓和雙穩(wěn)壓器的三路輸出調(diào)節(jié)器） |
| 文件頁(yè)數(shù)： | 10/12頁(yè) |
| 文件大?。?/td> | 320K |
| 代理商： | ISL6455A |
10
FN9196.0
December 21, 2005
Integrator Circuitry
Both ISL6455 LDO Regulators use external 33nF
compensation capacitors for minimizing load and line
regulation errors and for lowering output noise. When the
output voltage shifts due to varying load current or input
voltage, the integrator capacitor voltage is raised or lowered
to compensate for the systematic offset at the error amplifier.
Compensation is limited to ±5% to minimize transient
overshoot when the device goes out of dropout, current limit,
or thermal shutdown.
Shutdown
Driving the EN_LDO pin low will put LDO1 and LDO2 into
the shutdown mode. Driving the EN pin low will put the PWM
into shutdown mode. Pulling the EN and EN_LDO both pins
low simultaneously, puts the ISL6455, ISL6455A in a
shutdown mode, and supply current drops to 15μA typical.
Protection Features for the LDOs
Current Limit
The ISL6455 and ISL6455A monitor and control the pass
transistor’s gate voltage to limit the output current. The
current limit for both LDO1 and LDO2 is 330mA. The output
can be shorted to ground without damaging the part due to
the current limit and thermal protection features.
Thermal Overload Protection
Thermal overload protection limits total power dissipation in
the ISL6455, ISL6455A. When the junction temperature (T
J
)
exceeds +150°C, the thermal sensor sends a signal to the
shutdown logic, turning off the pass transistor and allowing
the IC to cool. The pass transistor turns on again after the
IC’s junction temperature typically cools by 20°C, resulting in
an intermittent output condition during continuous thermal
overload. Thermal overload protection protects the ISL6455,
ISL6455A against fault conditions. For continuous operation,
the absolute maximum junction temperature rating of
+150°C in not to be exceeded.
Operating Region and Power Dissipation
The maximum power dissipation of ISL6455 depends on the
thermal resistance of the IC package and circuit board, the
temperature difference between the die junction and ambient
air, and the rate of air flow. The power dissipated in the
device is:
PT = P1 + P2 + P3, where
P1 = I
OUT1
x V
OUT1
x n, n is the efficiency of the PWM
P2 = I
OUT2
(V
IN
– V
OUT2
)
P3 = I
OUT3
(V
IN
- V
OUT3
)
The maximum power dissipation is:
P
max
= (T
jmax
– T
A
)/
θ
JA
Where T
jmax
= 150°C, T
A
= ambient temperature, and
θ
JA
is
the thermal resistance from the junction to the surrounding
environment.
The ISL6455, ISL6455A package feature an exposed
thermal pad on its underside. This pad lowers the thermal
resistance of the package by providing a direct heat
conduction path from the die to the PC board. Additionally,
the ISL6455 and ISL6455A ground (GND_LDO and PGND)
performs the dual function of providing an electrical
connection to system ground and channeling heat away.
Connect the exposed bottom pad direct to the GND_LDO
ground plane.
Application Information
LDO Regulator Capacitor Selection and Regulator
Stability
Capacitors are required at the ISL6455, ISL6455A LDO
regulators’ input and output for stable operation over the
entire load range and the full temperature range. Use >1μF
capacitor at the input of LDO regulators, V
IN
_LDO pins. The
input capacitor lowers the source impedance of the input
supply. Larger capacitor values and lower ESR provide
better PSRR and line transient response. The input
capacitor must be located at a distance of not more than 0.5
inches from the V
IN
pins of the IC and returned to a clean
analog ground. Any good quality ceramic capacitor can be
used as an input capacitor.
The output capacitor must meet the requirements of
minimum amount of capacitance and ESR for both LDOs.
The ISL6455 is specifically designed to work with small
ceramic output capacitors. The output capacitor’s ESR
affects stability and output noise. Use an output capacitor
with an ESR of 50m
or less to insure stability and optimum
transient response. For stable operation, a ceramic
capacitor, with a minimum value of 3.3μF, is recommended
for V
OUT1
for 300mA output current, and 3.3μF is
recommended for V
OUT2
at 300mA load current. There is no
upper limit to the output capacitor value. A larger capacitor
can reduce noise and improve load transient response,
stability and PSRR. A higher value output capacitor (10μF) is
recommended for LDO2 when used to power VCO circuitry
in wireless chipsets. The output capacitor should be located
very close to V
OUT
pins to minimize impact of PC board
inductances and the other end of the capacitor should be
returned to a clean analog ground.
PWM Regulator Component Selection
INDUCTOR SELECTION
A 8.2μH typical output inductor is used with the ISL6455 and
a 12μH typical with the ISL6455A PWM section. Values less
than this may cause stability problems because of the
internal compensation of the regulator. The important
parameters of the inductor that need to be considered are
the current rating of the inductor and the DC resistance of
ISL6455, ISL6455A
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