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參數(shù)資料
| 型號： | ISL6440IAZ-T |
| 廠商： | INTERSIL CORP |
| 元件分類： | 穩(wěn)壓器 |
| 英文描述： | SMT RELAY |
| 中文描述： | 0.4 A DUAL SWITCHING CONTROLLER, 340 kHz SWITCHING FREQ-MAX, PDSO24 |
| 封裝： | 0.150 INCH, ROHS COMPLIANT, PLASTIC, QSOP-24 |
| 文件頁數(shù)： | 12/15頁 |
| 文件大?。?/td> | 346K |
| 代理商： | ISL6440IAZ-T |
12
FN9040.2
October 4, 2005
ringing. Careful component selection and proper PC board
layout minimizes the magnitude of these voltage spikes.
There are two sets of critical components in a DC/DC
converter using the ISL6440. The switching power
components and the small signal components. The
switching power components are the most critical from a
layout point of view because they switch a large amount of
energy so they tend to generate a large amount of noise.
The critical small signal components are those connected to
sensitive nodes or those supplying critical bias currents. A
multi-layer printed circuit board is recommended.
Layout Considerations
1. The Input capacitors, Upper FET, Lower FET, Inductor
and Output capacitor should be placed first. Isolate these
power components on the topside of the board with their
ground terminals adjacent to one another. Place the input
high frequency decoupling ceramic capacitor very close
to the MOSFETs. Making the gate traces as short and
thick as possible will limit the parasitic inductance and
reduce the level of dv/dt seen at the gate of the lower
FETs when the upper FET turns on.
2. Use separate ground planes for power ground and small
signal ground. Connect the SGND and PGND together
close of the IC. Do not connect them together anywhere
else.
3. The loop formed by Input capacitor, the top FET and the
bottom FET must be kept as small as possible.
4. Insure the current paths from the input capacitor to the
MOSFET; to the output inductor and output capacitor are
as short as possible with maximum allowable trace
widths.
5. Place The PWM controller IC close to lower FET. The
LGATE connection should be short and wide. The IC can
be best placed over a quiet ground area. Avoid switching
ground loop current in this area.
6. Place VCC5 bypass capacitor very close to VCC5 pin of
the IC and connect its ground to the PGND plane.
7. Place the gate drive components BOOT diode and BOOT
capacitors together near controller IC.
8. The output capacitors should be placed as close to the
load as possible. Use short wide copper regions to
connect output capacitors to load to avoid inductance and
resistances.
9. Use copper filled polygons or wide but short trace to
connect junction of upper FET. Lower FET and output
inductor. Also keep the PHASE node connection to the IC
short. Do not unnecessary oversize the copper islands for
PHASE node. Since the phase nodes are subjected to
very high dv/dt voltages, the stray capacitor formed
between these islands and the surrounding circuitry will
tend to couple switching noise.
10. Route all high speed switching nodes away from the
control circuitry.
11. Create separate small analog ground plane near the IC.
Connect SGND pin to this plane. All small signal
grounding paths including feedback resistors, current
limit setting resistors, SDx pull down resistors should be
connected to this SGND plane.
12. Ensure the feedback connection to output capacitor is
short and direct.
Component Selection Guidelines
MOSFET Considerations
The logic level MOSFETs are chosen for optimum efficiency
given the potentially wide input voltage range and output
power requirements. Two N-Channel MOSFETs are used in
each of the synchronous-rectified buck converters for the
PWM1 and PWM2 outputs. These MOSFETs should be
selected based upon r
DS(ON)
, gate supply requirements,
and thermal management considerations.
The power dissipation includes two loss components;
conduction loss and switching loss. These losses are
distributed between the upper and lower MOSFETs
according to duty cycle (see the following equations). The
conduction losses are the main component of power
dissipation for the lower MOSFETs. Only the upper MOSFET
has significant switching losses, since the lower device turns
on and off into near zero voltage. The equations assume
linear voltage-current transitions and do not model power
loss due to the reverse-recovery of the lower MOSFET’s
body diode.
2
(
)
r
V
IN
A large gate-charge increases the switching time, t
SW
,
which increases the upper MOSFET switching losses.
Ensure that both MOSFETs are within their maximum
junction temperature at high ambient temperature by
calculating the temperature rise according to package
thermal-resistance specifications.
Output Capacitor Selection
The output capacitors for each output have unique
requirements. In general, the output capacitors should be
selected to meet the dynamic regulation requirements
including ripple voltage and load transients. Selection of
output capacitors is also dependent on the output inductor,
so some inductor analysis is required to select the output
capacitors.
One of the parameters limiting the converter’s response to a
load transient is the time required for the inductor current to
slew to it’s new level. The ISL6440 will provide either 0% or
71% duty cycle in response to a load transient.
P
UPPER
--------------------------------------------------------------
)
I
-----------------------------------------------------------
(
)
V
(
)
t
2
)
+
=
P
LOWER
I
------------------------------------------------------------------------------
2
(
)
r
(
)
V
IN
V
–
(
)
=
ISL6440
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| ISL6440IAZ-T7 | 功能描述:電流型 PWM 控制器 LEAD-FREE DUAL PWM CONTROLLER + LINEAR CONTROLLER, 300KHZ, 1 RoHS:否 制造商:Texas Instruments 開關頻率:27 KHz 上升時間: 下降時間: 工作電源電壓:6 V to 15 V 工作電源電流:1.5 mA 輸出端數(shù)量:1 最大工作溫度:+ 105 C 安裝風格:SMD/SMT 封裝 / 箱體:TSSOP-14 |
| ISL6440IAZ-TK | 功能描述:IC REG CTRLR BUCK PWM CM 24-QSOP RoHS:是 類別:集成電路 (IC) >> PMIC - 穩(wěn)壓器 - DC DC 切換控制器 系列:- 產(chǎn)品培訓模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:2,500 系列:- PWM 型:電流模式 輸出數(shù):1 頻率 - 最大:275kHz 占空比:50% 電源電壓:18 V ~ 110 V 降壓:無 升壓:無 回掃:無 反相:無 倍增器:無 除法器:無 Cuk:無 隔離:是 工作溫度:-40°C ~ 85°C 封裝/外殼:8-SOIC（0.154"，3.90mm 寬） 包裝:帶卷 (TR) |
| ISL6441IR | 功能描述:IC CTRLR SGL/STEP DOWN PWM 28QFN RoHS:否 類別:集成電路 (IC) >> PMIC - 電源管理 - 專用 系列:- 應用說明:Ultrasound Imaging Systems Application Note 產(chǎn)品培訓模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:37 系列:- 應用:醫(yī)療用超聲波成像，聲納 電流 - 電源:- 電源電壓:2.37 V ~ 6 V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:56-WFQFN 裸露焊盤 供應商設備封裝:56-TQFN-EP（8x8） 包裝:管件 |
| ISL6441IR-T | 功能描述:IC CTRLR PWM DUAL 1.4MHZ 28-QFN RoHS:否 類別:集成電路 (IC) >> PMIC - 電源管理 - 專用 系列:- 應用說明:Ultrasound Imaging Systems Application Note 產(chǎn)品培訓模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:37 系列:- 應用:醫(yī)療用超聲波成像，聲納 電流 - 電源:- 電源電壓:2.37 V ~ 6 V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:56-WFQFN 裸露焊盤 供應商設備封裝:56-TQFN-EP（8x8） 包裝:管件 |
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