參數(shù)資料
型號(hào)： ISL6150IB
廠商： INTERSIL CORP
元件分類(lèi)： 電源管理
英文描述： Negative Voltage Hot Plug Controller
中文描述： 1-CHANNEL POWER SUPPLY SUPPORT CKT, PDSO8
封裝： MS-012-AA, PLASTIC, SOIC-8
文件頁(yè)數(shù)： 10/18頁(yè)
文件大小： 511K
代理商： ISL6150IB
10
ISL6150
(H version; Figure 9): Under normal conditions
(DRAIN < VPG), the Q3 DMOS will be on, shorting the
bottom of the internal resistor to VEE, and turning Q2 off. If
the pull-up current from the external module is high enough,
the voltage drop across the 6.2k
resistor will look like a
logic high (relative to DRAIN). Note that the module is only
referenced to DRAIN, not VEE (but under normal conditions,
the FET is on, and the DRAIN and VEE are almost the same
voltage).
When the DRAIN voltage is high compared to VPG, Q3
DMOS turns off, and the resistor and Q2 clamp the PWRGD
pin to one diode drop (~0.7V) above the DRAIN pin. This
should be able to pull low against the module pull-up current,
and disable the module.
Applications: GATE pin
To help protect the external FET, the output of the GATE pin
is internally clamped; up to an 80V supply, it will not be any
higher than 15V (nominal 14V). From about 18V down to
10V, the GATE voltage will be around 4V below the supply
voltage; at 10V supply, the minimum GATE voltage is 5.4V
(worst case is at -40°C).
Applications: Optional Components
In addition to the typical application, and the variations
already mentioned, there are a few other possible
components that might be used in specific cases. See
Figure 29 for some possibilities.
If the input power supply exceeds the 100V absolute
maximum rating, even for a short transient, that could cause
permanent damage to the IC, as well as other components
on the board. If this cannot be guaranteed, a voltage
suppressor (such as the SMAT70A, D1) is recommended.
When placed from VDD to VEE on the board, it will clamp
the voltage.
If transients on the input power supply occur when the
supply is near either the OV or UV trip points, the GATE
could turn on or off momentarily. One possible solution is to
add a filter cap C4 to the VDD pin, through isolation resistor
R10. A large value of R10 is better for the filtering, but be
aware of the voltage drop across it. For example, a 1k
resistor, with 1mA of IDD would have 1V across it and
dissipate 1mW. Since the UV and OV comparators are
referenced with respect to the VEE supply, they should not
be affected. But the GATE clamp voltage could be offset by
the voltage across the extra resistor.
If there are negative transients on the DRAIN pin, blocking
diodes may help limit the amount of current injected into the
IC substrate. General purpose diodes (such as 1N4148)
may be used. Note that the ISL6140 (L version) requires one
diode, while the ISL6150 (H version) requires two diodes.
One consequence of the added diodes it that the V
PG
voltage is offset by each diode drop.
The switch SW1 is shown as a simple pushbutton. It can be
replaced by an active switch, such as an NPN or NFET; the
principle is the same; pull the UV node below its trip point,
and then release it (toggle low). To connect an NFET, for
example, the drain goes to UV; the source to VEE, and the
gate is the input; if it goes high (relative to VEE), it turns the
NFET on, and UV is pulled low. Just make sure the NFET
resistance is low compared to the resistor divider, so that it
has no problem pulling down against it.
R8 is a pull-up resistor for PWRGD, if there is no other
component acting as a pull-up device. The value of R8 is
determined by how much current you want when pulled low
(also affected by the VDD voltage); and you want to pull it
low enough for a good logic low level. An LED can also be
placed in series with R8, if desired. In that case, the criteria
is the LED brightness versus current.
R7 and C3 are used to delay the Over-Current shutdown, as
described in the OV and UV section.
Applications: “Brick” Regulators
One of the typical loads used are DC/DC regulators, some
commonly known as “brick” regulators, (partly due to their
shape, and because it can be considered a “building block”
of a system). For a given input voltage range, there are
usually whole families of different output voltages and
current ranges. There are also various standardized sizes
and pinouts, starting with the original “full” brick, and since
getting smaller (half-bricks and quarter-bricks are now
common).
Other common features may include: all components
(except some filter capacitors) are self-contained in a
molded plastic package; external pins for connections; and
often an ENABLE input pin to turn it on or off. A hot plug IC,
such as the ISL6140, is often used to gate power to a brick,
as well as turn it on.
Many bricks have both logic polarities available (Enable Hi or
Lo input); select the ISL6140 (L version) and ISL6150 (H
version) to match. There is little difference between them,
although the L version output is usually simpler to interface.
The Enable input often has a pull-up resistor or current
source, or equivalent built in; care must be taken in the
+
-
+
VEE
VPG
(1.7V)
PWRGD
DRAIN
VDD
+
VIN+
VIN-
ON/OFF
VOUT+
VOUT-
CL
Q3
Q2
RPG
6.2K
ACTIVE HIGH
ENABLE
MODULE
(SECTION OF) ISL6150
(H VERSION)
FIGURE 9. ACTIVE HIGH ENABLE MODULE
ISL6140, ISL6150
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ISL6150IBZ 功能描述:IC CTRLR HOT PLUG NEG VOLT 8SOIC RoHS:是 類(lèi)別:集成電路 (IC) >> PMIC - 熱交換 系列:- 產(chǎn)品培訓(xùn)模塊:Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:100 系列:- 類(lèi)型:熱插拔開(kāi)關(guān) 應(yīng)用:通用 內(nèi)部開(kāi)關(guān):是 電流限制:可調(diào) 電源電壓:9 V ~ 13.2 V 工作溫度:-40°C ~ 150°C 安裝類(lèi)型:表面貼裝 封裝/外殼:10-WFDFN 裸露焊盤(pán) 供應(yīng)商設(shè)備封裝:10-TDFN-EP（3x3） 包裝:管件
ISL6150IBZ-T 功能描述:IC CTRLR HOT PLUG NEG VOLT 8SOIC RoHS:是 類(lèi)別:集成電路 (IC) >> PMIC - 熱交換 系列:- 產(chǎn)品培訓(xùn)模塊:Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:100 系列:- 類(lèi)型:熱插拔開(kāi)關(guān) 應(yīng)用:通用 內(nèi)部開(kāi)關(guān):是 電流限制:可調(diào) 電源電壓:9 V ~ 13.2 V 工作溫度:-40°C ~ 150°C 安裝類(lèi)型:表面貼裝 封裝/外殼:10-WFDFN 裸露焊盤(pán) 供應(yīng)商設(shè)備封裝:10-TDFN-EP（3x3） 包裝:管件
ISL6151 制造商:INTERSIL 制造商全稱(chēng):Intersil Corporation 功能描述:Negative Voltage Hot Plug Controller
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